Alternatives and similar repositories for timeloop-accelergy-exercises

Users that are interested in timeloop-accelergy-exercises are comparing it to the libraries listed below

• georgia-tech-synergy-lab / SIGMA
  RTL implementation of Flex-DPE.
  ☆115Updated 5 years ago
• Accelergy-Project / accelergy
  Accelergy is an energy estimation infrastructure for accelerator energy estimations
  ☆152Updated 7 months ago
• Accelergy-Project / accelergy-timeloop-infrastructure
  Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop
  ☆62Updated 2 months ago
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆147Updated 6 months ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆73Updated last month
• arc-research-lab / CHARM
  CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture
  ☆162Updated last week
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆65Updated 4 years ago
• KULeuven-MICAS / zigzag
  HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators
  ☆174Updated 2 months ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆92Updated last year
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• Aayush-Ankit / puma-simulator
  [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…
  ☆68Updated 2 years ago
• xuanyoya / Interstellar-CNN-scheduler
  Tool for optimize CNN blocking
  ☆94Updated 5 years ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆64Updated 5 months ago
• harvard-acc / smaug
  SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin
  ☆113Updated 2 years ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆83Updated 4 years ago
• maestro-project / gamma
  ☆42Updated last year
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆81Updated 6 years ago
• mit-emze / cimloop
  ☆77Updated 2 weeks ago
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆83Updated 2 years ago
• groupsada / DeepBurning
  Automatic generation of FPGA-based learning accelerators for the neural network family
  ☆66Updated 6 years ago
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆69Updated 2 months ago
• neurosim / DNN_NeuroSim_V1.3
  Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)
  ☆74Updated 2 years ago
• KULeuven-MICAS / DeFiNES
  A framework for fast exploration of the depth-first scheduling space for DNN accelerators
  ☆43Updated 2 years ago
• isakedo / DNNsim
  ☆35Updated 5 years ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆45Updated 3 years ago
• GATECH-EIC / AutoDNNchip
  ☆71Updated 5 years ago
• UCLA-VAST / FlexCNN
  ☆72Updated 2 years ago
• Zhaoshixin-sky / CIM-MLC
  [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators
  ☆45Updated last year
• PSAL-POSTECH / ONNXim
  ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference
  ☆177Updated 2 weeks ago
• Accelergy-Project / timeloop-accelergy-tutorial
  Docker container with tools for the Timeloop/Accelergy tutorial
  ☆22Updated last year