ucb-bar / cosa
A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
☆79Updated last year
Alternatives and similar repositories for cosa:
Users that are interested in cosa are comparing it to the libraries listed below
- A reference implementation of the Mind Mappings Framework.☆29Updated 3 years ago
- MICRO22 artifact evaluation for Sparseloop☆43Updated 2 years ago
- ☆32Updated 3 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆69Updated 5 years ago
- ☆39Updated 8 months ago
- ☆25Updated 3 years ago
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆48Updated 3 months ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆70Updated 3 years ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆62Updated last year
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆48Updated last month
- ☆28Updated 3 years ago
- ☆16Updated 2 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 2 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆50Updated 2 weeks ago
- ☆47Updated last month
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆28Updated 9 months ago
- ☆29Updated 3 months ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆62Updated last week
- ☆25Updated 2 years ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆48Updated last week
- agile hardware-software co-design☆47Updated 3 years ago
- RTL implementation of Flex-DPE.☆98Updated 5 years ago
- EQueue Dialect☆40Updated 3 years ago
- Tool for optimize CNN blocking☆94Updated 4 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆58Updated 5 months ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆73Updated last week
- Release of stream-specialization software/hardware stack.☆121Updated last year
- An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…☆83Updated 10 months ago
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆55Updated 3 years ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆62Updated 8 months ago