maestro-project / gammaLinks
☆42Updated last year
Alternatives and similar repositories for gamma
Users that are interested in gamma are comparing it to the libraries listed below
Sorting:
- MICRO22 artifact evaluation for Sparseloop☆44Updated 3 years ago
- ☆35Updated 5 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆82Updated 4 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆83Updated 2 years ago
- RTL implementation of Flex-DPE.☆115Updated 5 years ago
- ☆17Updated 3 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆91Updated last year
- A reference implementation of the Mind Mappings Framework.☆30Updated 3 years ago
- ☆72Updated 2 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆47Updated 3 years ago
- ☆32Updated 4 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆59Updated last month
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆65Updated 4 years ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆70Updated 2 weeks ago
- Neural Network Evaluation Tool on Crossbar-based Accelerator with Resistive Memory☆41Updated 6 years ago
- ☆13Updated last year
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆48Updated last year
- Tool for optimize CNN blocking☆93Updated 5 years ago
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆153Updated 5 months ago
- STONNE: A Simulation Tool for Neural Networks Engines☆145Updated 5 months ago
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆63Updated 4 months ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆68Updated 2 years ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆69Updated last month
- ☆10Updated 2 years ago
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆47Updated 2 months ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- ☆71Updated last month
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆60Updated 3 years ago
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆76Updated 6 months ago
- ☆71Updated 5 years ago