harvard-acc / smaug
SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin
☆104Updated 2 years ago
Alternatives and similar repositories for smaug:
Users that are interested in smaug are comparing it to the libraries listed below
- STONNE: A Simulation Tool for Neural Networks Engines☆124Updated 8 months ago
- RTL implementation of Flex-DPE.☆97Updated 4 years ago
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆228Updated 2 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆66Updated 5 years ago
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆132Updated last week
- A pre-RTL, power-performance model for fixed-function accelerators☆174Updated last year
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆68Updated 3 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- Automatic generation of FPGA-based learning accelerators for the neural network family☆60Updated 5 years ago
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆128Updated last month
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆46Updated 4 months ago
- MICRO22 artifact evaluation for Sparseloop☆41Updated 2 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆77Updated 6 months ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆60Updated 3 years ago
- gem5 repository to study chiplet-based systems☆68Updated 5 years ago
- Release of stream-specialization software/hardware stack.☆120Updated last year
- Exercises for exploring the Fibertree, Timeloop and Accelergy tools☆89Updated 3 weeks ago
- A dataflow architecture for universal graph neural network inference via multi-queue streaming.☆70Updated 2 years ago
- An analytical cost model evaluating DNN mappings (dataflows and tiling).☆205Updated 10 months ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆62Updated last year
- ☆39Updated 7 months ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆48Updated 3 weeks ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆60Updated 7 months ago
- This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…☆42Updated last year
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 2 years ago
- Benchmarks for Accelerator Design and Customized Architectures☆117Updated 4 years ago
- ☆89Updated last year
- A RISC-V BOOM Microarchitecture Power Modeling Framework☆23Updated last year
- A co-design architecture on sparse attention☆51Updated 3 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆66Updated last year