PolyArch / stream-dataflowLinks
Public Release of Stream-Dataflow
☆14Updated 6 years ago
Alternatives and similar repositories for stream-dataflow
Users that are interested in stream-dataflow are comparing it to the libraries listed below
Sorting:
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆48Updated 3 years ago
- GARDENIA: Graph Analytics Repository for Designing Efficient Next-generation Accelerators☆34Updated 3 years ago
- MAFIA: Multiple Application Framework for GPU architectures☆28Updated 3 years ago
- EQueue Dialect☆41Updated 3 years ago
- ☆27Updated 6 years ago
- ☆14Updated 4 years ago
- Graph accelerator on FPGAs and ASICs☆11Updated 7 years ago
- Stencil with Optimized Dataflow Architecture Compiler☆17Updated 5 years ago
- Code released to accompany the ISCA paper: "T4: Compiling Sequential Code for Effective Speculative Parallelization in Hardware"☆28Updated 3 years ago
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆25Updated last year
- ☆13Updated 3 years ago
- MLSys 2021 paper: MicroRec: efficient recommendation inference by hardware and data structure solutions☆19Updated 4 years ago
- Polyhedral High-Level Synthesis in MLIR☆35Updated 2 years ago
- Repository for the tools and non-commercial data used for the "Accelerator wall" paper.☆52Updated 6 years ago
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Updated 5 years ago
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆23Updated 5 years ago
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆23Updated 7 years ago
- ☆15Updated 5 years ago
- ☆29Updated 4 years ago
- Replace original DRAM model in GPGPU-sim with Ramulator DRAM model☆20Updated 7 years ago
- SparseP is the first open-source Sparse Matrix Vector Multiplication (SpMV) software package for real-world Processing-In-Memory (PIM) ar…☆77Updated 3 years ago
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆22Updated 2 years ago
- ☆22Updated 11 months ago
- The source code for GPGPUSim+Ramulator simulator. In this version, GPGPUSim uses Ramulator to simulate the DRAM. This simulator is used t…☆58Updated 6 years ago
- A graph linear algebra overlay☆51Updated 2 years ago
- ☆70Updated 4 years ago
- A Dataflow library for graph analytics acceleration☆14Updated 10 years ago
- ☆38Updated 3 years ago
- Domain-Specific Architecture Generator 2☆21Updated 3 years ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Updated last year