BradMcDanel / multiplication-free-dnnLinks
☆10Updated 6 years ago
Alternatives and similar repositories for multiplication-free-dnn
Users that are interested in multiplication-free-dnn are comparing it to the libraries listed below
Sorting:
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 3 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆22Updated 4 years ago
- ☆41Updated last year
- ☆71Updated 2 years ago
- RTL implementation of Flex-DPE.☆106Updated 5 years ago
- A general framework for optimizing DNN dataflow on systolic array☆39Updated 4 years ago
- ☆33Updated 3 years ago
- [ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architecture…☆25Updated 2 years ago
- ☆33Updated 6 years ago
- A reference implementation of the Mind Mappings Framework.☆30Updated 3 years ago
- ☆71Updated 5 years ago
- Tool for optimize CNN blocking☆94Updated 5 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆79Updated 3 years ago
- ☆10Updated 2 years ago
- ☆27Updated 5 years ago
- This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…☆44Updated 2 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆54Updated 3 months ago
- ☆35Updated 5 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆20Updated 2 years ago
- ☆18Updated 2 years ago
- ☆27Updated 3 months ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆81Updated 11 months ago
- Simulator for BitFusion☆100Updated 4 years ago
- ☆16Updated 3 years ago
- Neural Network Evaluation Tool on Crossbar-based Accelerator with Resistive Memory☆40Updated 5 years ago
- Lab code for three-day lecture, "Designing CNN Accelerators using Bluespec System Verilog", given at SNU in December 2017☆30Updated 6 years ago
- MICRO22 artifact evaluation for Sparseloop☆45Updated 2 years ago
- A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration☆34Updated 3 years ago
- NeuraChip Accelerator Simulator☆13Updated last year
- ☆25Updated last year