Alternatives and similar repositories for neurachip

Users that are interested in neurachip are comparing it to the libraries listed below

• tsinghua-ideal / spada-sim
  The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow
  ☆37Updated 2 years ago
• jasonlin316 / GCN-Inference-Acceleration-HLS
  An end-to-end GCN inference accelerator written in HLS
  ☆19Updated 3 years ago
• stonne-simulator / sst-elements-with-stonne
  STONNE Simulator integrated into SST Simulator
  ☆20Updated last year
• sharc-lab / DGNN-Booster
  ☆16Updated 2 years ago
• linghaosong / Serpens
  An HBM FPGA based SpMV Accelerator
  ☆13Updated 10 months ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 3 years ago
• hngenc / stellar
  ☆30Updated 8 months ago
• estwings57 / CasHMC
  CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube
  ☆22Updated 6 years ago
• scalesim-project / krittika
  Heterogenous ML accelerator
  ☆18Updated 2 months ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆79Updated 3 years ago
• UCLA-VAST / Serpens
  Serpens is an HBM FPGA accelerator for SpMV
  ☆19Updated 11 months ago
• he-actlab / planaria.code
  ☆28Updated 3 years ago
• maestro-project / magma
  ☆16Updated 3 years ago
• PKUZHOU / GNNear-PACT-2022
  GNNear: Accelerating Full-Batch Training of Graph NeuralNetworks with Near-Memory Processing
  ☆13Updated 2 years ago
• Xtra-Computing / ReGraph
  Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines
  ☆20Updated 2 years ago
• maestro-project / confuciux
  ☆33Updated 3 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆93Updated 9 months ago
• kartik-hegde / mindmappings
  A reference implementation of the Mind Mappings Framework.
  ☆30Updated 3 years ago
• hplp / PiMulator
  Processing in Memory Emulation
  ☆20Updated 2 years ago
• AlbertoParravicini / approximate-spmv-topk
  Public repostory for the DAC 2021 paper "Scaling up HBM Efficiency of Top-K SpMV forApproximate Embedding Similarity on FPGAs"
  ☆14Updated 3 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆81Updated 11 months ago
• Accelergy-Project / processing-in-memory-design
  ☆25Updated last year
• casys-kaist / mNPUsim
  mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
  ☆58Updated 7 months ago
• Systems-ShiftLab / MultiPIM
  MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator
  ☆55Updated 4 years ago
• UCLA-VAST / splag
  Accelerating SSSP for power-law graphs using an FPGA.
  ☆23Updated 3 years ago
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆82Updated last year
• CASR-HKU / AGNA-FCCM2023
  ☆12Updated last year
• jha-lab / codebench
  [TECS'23] A project on the co-design of Accelerators and CNNs.
  ☆20Updated 2 years ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆65Updated 3 years ago
• cornell-zhang / GraphLily
  A graph linear algebra overlay
  ☆51Updated 2 years ago