stonne-simulator / omega
A simulation framework for modeling efficiency of Graph Neural Network Dataflows
☆22Updated 3 months ago
Alternatives and similar repositories for omega
Users that are interested in omega are comparing it to the libraries listed below
Sorting:
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- STONNE Simulator integrated into SST Simulator☆19Updated last year
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆19Updated last year
- An HBM FPGA based SpMV Accelerator☆12Updated 8 months ago
- A graph linear algebra overlay☆51Updated 2 years ago
- A Toy-Purpose TPU Simulator☆18Updated 11 months ago
- NeuraChip Accelerator Simulator☆11Updated last year
- agile hardware-software co-design☆46Updated 3 years ago
- ☆21Updated 2 months ago
- A Full-System Framework for Simulating NDP devices from Caches to DRAM☆16Updated last year
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 3 years ago
- ☆26Updated last year
- A new DRAM substrate that mitigates the excessive energy consumption from both (i) transmitting unused data on the memory channel and (i…☆12Updated 8 months ago
- ☆35Updated 4 years ago
- Heterogeneous Accelerated Computed Cluster (HACC) Resources Page☆21Updated last week
- Code base for OOPSLA'24 paper: UniSparse: An Intermediate Language for General Sparse Format Customization☆30Updated 6 months ago
- Fibertree emulator☆12Updated 6 months ago
- GNNear: Accelerating Full-Batch Training of Graph NeuralNetworks with Near-Memory Processing☆13Updated 2 years ago
- A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.☆18Updated 3 years ago
- ACM TODAES Best Paper Award, 2022☆23Updated last year
- ☆25Updated 3 years ago
- cycle accurate Network-on-Chip Simulator☆27Updated 2 years ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆28Updated last year
- AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…☆22Updated last month
- ☆14Updated 3 years ago
- NeuroSpector: Dataflow and Mapping Optimizer for Deep Neural Network Accelerators☆20Updated last month
- The source code for GPGPUSim+Ramulator simulator. In this version, GPGPUSim uses Ramulator to simulate the DRAM. This simulator is used t…☆55Updated 5 years ago
- EQueue Dialect☆40Updated 3 years ago
- NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators☆35Updated 4 months ago
- SimplePIM is the first high-level programming framework for real-world processing-in-memory (PIM) architectures. Described in the PACT 20…☆26Updated last year