stonne-simulator / omegaLinks
A simulation framework for modeling efficiency of Graph Neural Network Dataflows
☆23Updated 8 months ago
Alternatives and similar repositories for omega
Users that are interested in omega are comparing it to the libraries listed below
Sorting:
- STONNE Simulator integrated into SST Simulator☆21Updated last year
- Domain-Specific Architecture Generator 2☆22Updated 3 years ago
- NeuraChip Accelerator Simulator☆14Updated last year
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆47Updated 3 years ago
- ☆32Updated 11 months ago
- ☆25Updated last year
- A graph linear algebra overlay☆51Updated 2 years ago
- Processing in Memory Emulation☆22Updated 2 years ago
- Heterogenous ML accelerator☆19Updated 5 months ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆30Updated 2 years ago
- agile hardware-software co-design☆52Updated 3 years ago
- An HBM FPGA based SpMV Accelerator☆16Updated last year
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆39Updated 2 years ago
- A reference implementation of the Mind Mappings Framework.☆30Updated 3 years ago
- A Full-System Framework for Simulating NDP devices from Caches to DRAM☆20Updated last year
- PIM-ML is a benchmark for training machine learning algorithms on the UPMEM architecture, which is the first publicly-available real-worl…☆24Updated 9 months ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Updated 4 years ago
- Serpens is an HBM FPGA accelerator for SpMV☆22Updated last year
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆22Updated 2 years ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- Fibertree emulator☆15Updated 11 months ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆83Updated 2 years ago
- Artifact for "DX100: A Programmable Data Access Accelerator for Indirection (ISCA 2025)" paper☆13Updated 6 months ago
- A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.☆18Updated 3 years ago
- ☆41Updated last year
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆24Updated 10 months ago
- ☆10Updated 2 years ago
- HLS project modeling various sparse accelerators.☆12Updated 3 years ago
- ☆13Updated 2 years ago
- ☆29Updated 3 years ago