maeri-project / mRNA

Related projects ⓘ

Alternatives and complementary repositories for mRNA

• maestro-project / magma
  ☆16Updated 2 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆44Updated 2 years ago
• maestro-project / gamma
  ☆33Updated 4 months ago
• kartik-hegde / mindmappings
  A reference implementation of the Mind Mappings Framework.
  ☆28Updated 2 years ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆59Updated 3 years ago
• he-actlab / planaria.code
  ☆25Updated 3 years ago
• casys-kaist / mNPUsim
  mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
  ☆38Updated 6 months ago
• MPSLab-ASU / DiRAC
  Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators
  ☆28Updated last year
• horizon-research / systolic-array-dataflow-optimizer
  A general framework for optimizing DNN dataflow on systolic array
  ☆33Updated 3 years ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆20Updated 2 years ago
• UCLA-VAST / hbmbench
  ☆23Updated 3 years ago
• sfu-arch / SpGEMM
  ☆33Updated 3 years ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆65Updated 3 years ago
• stonne-simulator / sst-elements-with-stonne
  STONNE Simulator integrated into SST Simulator
  ☆17Updated 7 months ago
• yonseicasl / NeuroSpector
  NeuroSpector: Dataflow and Mapping Optimization of Deep Neural Network Accelerators
  ☆17Updated this week
• maestro-project / confuciux
  ☆31Updated 3 years ago
• scalesim-project / krittika
  Heterogenous ML accelerator
  ☆16Updated last month
• cornell-zhang / GLAIVE
  Graph-learning assisted instruction vulnerability estimation published in DATE 2020
  ☆13Updated 3 years ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆29Updated 2 years ago
• Accelergy-Project / processing-in-memory-design
  ☆24Updated 6 months ago
• Accelergy-Project / pytorch2timeloop-converter
  ☆10Updated last month
• Accelergy-Project / accelergy-timeloop-infrastructure
  Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop
  ☆46Updated this week
• yhqiu16 / TRAM
  Template-based Reconfigurable Architecture Modeling Framework
  ☆13Updated 2 years ago
• UCLA-VAST / Serpens
  Serpens is an HBM FPGA accelerator for SpMV
  ☆14Updated 3 months ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆39Updated 2 years ago
• UIUC-ChenLab / Nimblock
  ☆10Updated last year
• maeri-project / MAERI_bsv_isca2018
  MAERI public release
  ☆31Updated 3 years ago
• Accelergy-Project / timeloop-accelergy-tutorial
  Docker container with tools for the Timeloop/Accelergy tutorial
  ☆23Updated 6 months ago
• KULeuven-MICAS / zigzag-imc
  HW accelerator mapping optimization framework for in-memory computing
  ☆18Updated 2 months ago