Alternatives and similar repositories for spada-sim

Users that are interested in spada-sim are comparing it to the libraries listed below

• Systems-ShiftLab / MultiPIM
  MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator
  ☆56Updated 4 years ago
• he-actlab / planaria.code
  ☆29Updated 3 years ago
• Yinxiao-Feng / chiplet-network-sim
  ☆44Updated 4 months ago
• Aayush-Ankit / puma-simulator
  [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…
  ☆67Updated 2 years ago
• leesou / H2-LLM-ISCA-2025
  H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference
  ☆65Updated 5 months ago
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆83Updated 2 years ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆70Updated last year
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• casys-kaist / mNPUsim
  mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
  ☆64Updated 9 months ago
• stonne-simulator / sst-elements-with-stonne
  STONNE Simulator integrated into SST Simulator
  ☆21Updated last year
• NeuraChip / neurachip
  NeuraChip Accelerator Simulator
  ☆14Updated last year
• SET-Scheduling-Project / GEMINI-HPCA2024
  Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
  ☆93Updated 5 months ago
• PKUZHOU / GNNear-PACT-2022
  GNNear: Accelerating Full-Batch Training of Graph NeuralNetworks with Near-Memory Processing
  ☆13Updated 3 years ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆59Updated 6 months ago
• PolyArch / dsa-framework
  Release of stream-specialization software/hardware stack.
  ☆121Updated 2 years ago
• ConvolutedDog / HyFiSS
  HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs
  ☆36Updated 9 months ago
• UVA-LavaLab / PIMeval-PIMbench
  PIMeval simulator and PIMbench suite
  ☆33Updated 2 months ago
• miglopst / PIM_NDP_papers
  ☆65Updated 4 years ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆44Updated 3 years ago
• UniNDP-hpca25-ae / UniNDP
  Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"
  ☆41Updated last month
• PolyArch / gem-forge-framework
  ☆25Updated last year
• scalesim-project / scale-sim-v3
  ☆45Updated last month
• UCLA-VAST / Serpens
  Serpens is an HBM FPGA accelerator for SpMV
  ☆21Updated last year
• scale-snu / attacc_simulator
  ☆92Updated last year
• Xtra-Computing / ReGraph
  Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines
  ☆22Updated 3 years ago
• pku-liang / TENET
  An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…
  ☆86Updated last year
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆77Updated 6 years ago
• sharc-lab / FlowGNN
  A dataflow architecture for universal graph neural network inference via multi-queue streaming.
  ☆73Updated 2 years ago
• hngenc / stellar
  ☆31Updated 10 months ago
• illinois-impact / puma-compiler
  PUMA Compiler
  ☆29Updated 5 years ago