tsinghua-ideal / spada-simLinks
The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow
☆38Updated 2 years ago
Alternatives and similar repositories for spada-sim
Users that are interested in spada-sim are comparing it to the libraries listed below
Sorting:
- ☆40Updated 2 months ago
- STONNE Simulator integrated into SST Simulator☆20Updated last year
- ☆29Updated 3 years ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Updated 4 years ago
- GNNear: Accelerating Full-Batch Training of Graph NeuralNetworks with Near-Memory Processing☆13Updated 2 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆82Updated last year
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆65Updated 2 years ago
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆62Updated 8 months ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated 10 months ago
- NeuraChip Accelerator Simulator☆14Updated last year
- ☆25Updated last year
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆37Updated 8 months ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆86Updated 3 months ago
- Release of stream-specialization software/hardware stack.☆121Updated 2 years ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆68Updated last year
- ☆57Updated 5 months ago
- PIMeval simulator and PIMbench suite☆33Updated 3 weeks ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆77Updated 6 years ago
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆31Updated last month
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- ☆30Updated 9 months ago
- Serpens is an HBM FPGA accelerator for SpMV☆19Updated last year
- ☆28Updated 2 years ago
- MICRO22 artifact evaluation for Sparseloop☆44Updated 3 years ago
- SimplePIM is the first high-level programming framework for real-world processing-in-memory (PIM) architectures. Described in the PACT 20…☆27Updated last year
- Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025☆85Updated 3 months ago
- ☆65Updated 4 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆80Updated 3 years ago
- Artifact evaluation of PLDI'24 paper "Allo: A Programming Model for Composable Accelerator Design"☆28Updated last year
- ☆15Updated 4 months ago