merledu / magma-siLinks
Matrix Accelerator Generator for GeMM Operations based on SIGMA Architecture in CHISEL HDL
☆11Updated last year
Alternatives and similar repositories for magma-si
Users that are interested in magma-si are comparing it to the libraries listed below
Sorting:
- Wraps the NVDLA project for Chipyard integration☆21Updated last month
- M-extension for RISC-V cores.☆31Updated 6 months ago
- SRAM☆8Updated 4 years ago
- Ultra High Performance AXI4-based Direct Memory Access (DMA) Controller. Work in Progress.☆13Updated 7 months ago
- AXI X-Bar☆19Updated 5 years ago
- System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆22Updated last week
- A Rocket-based RISC-V superscalar in-order core☆33Updated last month
- LLM Agent for Hardware Description Language☆20Updated this week
- Azadi (Freedom) is a 32-bit RISC-V CPU based System on Chip.☆32Updated last year
- 2-8bit weights, 8-bit activations flexible Neural Processing Engine for PULP clusters☆25Updated this week
- ASIC Design of the openSPARC Floating Point Unit☆13Updated 8 years ago
- The 3rd Iteration of the Berkeley RISC-V DMA Accelerator☆27Updated 5 years ago
- LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peri…☆38Updated 2 years ago
- A simple, scalable, source-synchronous, all-digital DDR link☆26Updated last week
- CMake based hardware build system☆25Updated this week
- Virtualized Accelerator Orchestration for Multi-Tenant Workloads☆15Updated 6 months ago
- sram/rram/mram.. compiler☆35Updated last year
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Updated 4 months ago
- Chisel implementation of Neural Processing Unit for System on the Chip☆21Updated 3 weeks ago
- A fault-injection framework using Chisel and FIRRTL☆36Updated last month
- LibreSilicon's Standard Cell Library Generator☆18Updated last year
- Benchmarks for Yosys development☆24Updated 5 years ago
- Design, verification and ASIC implementation of a complete RISC-V CPU with: five stages pipeline, forwarding, automatic hazard detection,…☆14Updated 5 years ago
- Extended and external tests for Verilator testing☆16Updated 2 weeks ago
- DUTH RISC-V Superscalar Microprocessor☆31Updated 7 months ago
- Hardware Description Language Translator☆16Updated last week
- Alpha64 R10000 Two-Way Superscalar Processor☆12Updated 6 years ago
- This work implements a dynamic programming algorithm for performing local sequence alignment. Through parallelism, it can run 136X times …☆26Updated 5 years ago
- Computational Storage Device based on the open source project OpenSSD.☆23Updated 4 years ago
- Chisel Cheatsheet☆33Updated 2 years ago