Alternatives and similar repositories for oss-cad-suite-build

Users that are interested in oss-cad-suite-build are comparing it to the libraries listed below

• trabucayre / openFPGALoader
  Universal utility for programming FPGA
  ☆1,362Updated last week
• YosysHQ / nextpnr
  nextpnr portable FPGA place and route tool
  ☆1,459Updated this week
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,604Updated 3 weeks ago
• projf / projf-explore
  Project F brings FPGAs to life with exciting open-source designs you can build on.
  ☆675Updated 5 months ago
• YosysHQ / apicula
  Project Apicula 🐝: bitstream documentation for Gowin FPGAs
  ☆564Updated this week
• chipsalliance / f4pga
  FOSS Flow For FPGA
  ☆391Updated 5 months ago
• litex-hub / linux-on-litex-vexriscv
  Linux on LiteX-VexRiscv
  ☆642Updated 3 weeks ago
• stnolting / neorv32
  🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independe…
  ☆1,792Updated this week
• drom / awesome-hdl
  Hardware Description Languages
  ☆1,038Updated 4 months ago
• olofk / fusesoc
  Package manager and build abstraction tool for FPGA/ASIC development
  ☆1,300Updated last week
• lnis-uofu / OpenFPGA
  An Open-source FPGA IP Generator
  ☆924Updated this week
• TerosTechnology / vscode-terosHDL
  VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
  ☆625Updated 2 months ago
• zachjs / sv2v
  SystemVerilog to Verilog conversion
  ☆639Updated last month
• gtkwave / gtkwave
  GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard …
  ☆789Updated last week
• YosysHQ / icestorm
  Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
  ☆1,072Updated 3 weeks ago
• VLSIDA / OpenRAM
  An open-source static random access memory (SRAM) compiler.
  ☆911Updated 2 months ago
• os-fpga / open-source-fpga-resource
  A list of resources related to the open-source FPGA projects
  ☆413Updated 2 years ago
• open-logic / open-logic
  Open Logic FPGA Standard Library
  ☆647Updated this week
• FPGAwars / apio
  Open source ecosystem for open FPGA boards
  ☆861Updated this week
• RTimothyEdwards / magic
  Magic VLSI Layout Tool
  ☆543Updated this week
• m-labs / migen
  A Python toolbox for building complex digital hardware
  ☆1,282Updated 2 weeks ago
• chipsalliance / verible
  Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
  ☆1,567Updated 2 weeks ago
• JulianKemmerer / PipelineC
  A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …
  ☆660Updated this week
• f4pga / prjxray
  Documenting the Xilinx 7-series bit-stream format.
  ☆805Updated 3 weeks ago
• lowRISC / ibex
  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
  ☆1,570Updated this week
• black-parrot / black-parrot
  A Linux-capable RISC-V multicore for and by the world
  ☆709Updated last month
• sergeykhbr / riscv_vhdl
  Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators
  ☆667Updated this week
• laforest / FPGADesignElements
  A self-contained online book containing a library of FPGA design modules and related coding/design guides.
  ☆435Updated 9 months ago
• ghdl / ghdl-yosys-plugin
  VHDL synthesis (based on ghdl)
  ☆335Updated last month
• chipsalliance / Cores-VeeR-EH1
  VeeR EH1 core
  ☆884Updated 2 years ago