embedeep / Free-TPULinks
Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classification, detection, and segmentation problem.
☆265Updated 2 years ago
Alternatives and similar repositories for Free-TPU
Users that are interested in Free-TPU are comparing it to the libraries listed below
Sorting:
- NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.☆366Updated last year
- DPU on PYNQ☆228Updated 2 months ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆332Updated 6 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆279Updated 5 years ago
- ☆250Updated 5 years ago
- Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…☆112Updated 7 years ago
- NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…☆230Updated 6 years ago
- Implementation of a Tensor Processing Unit for embedded systems and the IoT.☆511Updated 6 years ago
- A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.☆433Updated 5 years ago
- A FPGA Based CNN accelerator, following Google's TPU V1.☆161Updated 6 years ago
- A convolutional neural network implemented in hardware (verilog)☆163Updated 8 years ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆144Updated 7 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆74Updated 7 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆185Updated 8 years ago
- FPGA Accelerator for CNN using Vivado HLS☆324Updated 4 years ago
- First lesson for you to use DNNDK, also it can be helpful for your AI learning☆75Updated last year
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆164Updated 3 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆107Updated 7 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆242Updated 6 years ago
- XJTU-Tripler is based on HiPU100, an FPGA-friendly DNN accelerator, developed by CAG, Institute of AI & Robotics, XJTU.☆189Updated last year
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆154Updated 5 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆142Updated 7 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 8 years ago
- FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference☆159Updated 2 years ago
- PYNQ, Neural network Language model, Overlay☆111Updated 6 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆224Updated 6 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆91Updated 6 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆47Updated 5 years ago
- Vitis HLS Library for FINN☆208Updated 3 weeks ago
- An Open Source Deep Learning Inference Engine Based on FPGA☆160Updated 4 years ago