Alternatives and similar repositories for Free-TPU:

Users that are interested in Free-TPU are comparing it to the libraries listed below

• cea-wind / SimpleTPU
  A FPGA Based CNN accelerator, following Google's TPU V1.
  ☆144Updated 5 years ago
• Xilinx / QNN-MO-PYNQ
  ☆247Updated 4 years ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆217Updated last year
• Xilinx / CHaiDNN
  HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
  ☆324Updated 5 years ago
• fpgasystems / spooNN
  FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)
  ☆266Updated 5 years ago
• JunningWu / Learning-NVDLA-Notes
  NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…
  ☆225Updated 6 years ago
• changwoolee / lenet5_hls
  FPGA Accelerator for CNN using Vivado HLS
  ☆316Updated 3 years ago
• mtmd / FPGA_Based_CNN
  FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.
  ☆181Updated 8 years ago
• IBM / AccDNN
  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
  ☆415Updated 5 years ago
• Er1cZ / Deploying_CNN_on_FPGA_using_OpenCL
  Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…
  ☆107Updated 6 years ago
• HWAC-DL / hwac_object_tracker
  FPGA accelerated TinyYOLO v2 object detection neural network
  ☆71Updated 6 years ago
• cornell-zhang / bnn-fpga
  Binarized Convolutional Neural Networks on Software-Programmable FPGAs
  ☆304Updated 4 years ago
• pp-Innovate / FPGA-ZynqNet
  FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS
  ☆110Updated 7 years ago
• hsharma35 / dnnweaver2
  Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.
  ☆209Updated 5 years ago
• LeiWang1999 / ZYNQ-NVDLA
  NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
  ☆331Updated last year
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆157Updated 7 years ago
• hillhao / PYNQ-project
  PYNQ, Neural network Language model, Overlay
  ☆106Updated 5 years ago
• jofrfu / tinyTPU
  Implementation of a Tensor Processing Unit for embedded systems and the IoT.
  ☆450Updated 6 years ago
• Yu-Zhewen / Tiny_YOLO_v3_ZYNQ
  Implement Tiny YOLO v3 on ZYNQ
  ☆286Updated 2 years ago
• diaoenmao / FPGA-CNN
  FPGA implementation of Cellular Neural Network (CNN)
  ☆139Updated 7 years ago
• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆172Updated last year
• lulinchen / cnn_open
  A hardware implementation of CNN, written by Verilog and synthesized on FPGA
  ☆226Updated 6 years ago
• Xilinx / Vitis_Embedded_Platform_Source
  ☆122Updated 4 months ago
• embedeep / FREE-TPU-V3plus-for-FPGA
  FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference
  ☆141Updated last year
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆190Updated 3 weeks ago
• xupsh / pp4fpgas-cn-hls
  HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn
  ☆234Updated 3 years ago
• zhan6841 / FPGA-Accelerator-for-AES-LeNet-VGG16
  FPGA/AES/LeNet/VGG16
  ☆99Updated 6 years ago
• Xilinx / Embedded-Reference-Platforms-User-Guide
  Formerly known as the 'reVISION Getting Started Guide', the Embedded Reference Platforms User Guide covers the embedded vision reference …
  ☆11Updated last year
• OpenDLA / OpenDLA
  A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.
  ☆141Updated 7 years ago
• canteen-man / CNN_FPGA_ZYNQ_PYNQ
  hls code zynq 7020 pynq z2 CNN
  ☆81Updated 6 years ago