SameLight / ITRI-OpenDLA
Express DLA implementation for FPGA, revised based on NVDLA.
☆9Updated 5 years ago
Alternatives and similar repositories for ITRI-OpenDLA:
Users that are interested in ITRI-OpenDLA are comparing it to the libraries listed below
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆22Updated 3 years ago
- Learn NVDLA by SOMNIA☆33Updated 5 years ago
- Systolic-array based Deep Learning Accelerator generator☆25Updated 4 years ago
- OpenDLA for trying the demo and FPGA solution☆16Updated 2 years ago
- LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peri…☆36Updated 2 years ago
- NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators☆29Updated 2 months ago
- ☆34Updated 3 years ago
- Designs for finalist teams of the DAC System Design Contest☆36Updated 4 years ago
- A static dataflow CGRA with dynamic dataflow execution capability☆10Updated 3 years ago
- ☆8Updated last year
- cycle accurate Network-on-Chip Simulator☆27Updated last year
- Reconfigurable Binary Engine☆16Updated 3 years ago
- LCAI-TIHU SW is a software stack of the AI inference processor based on RISC-V☆23Updated 2 years ago
- ☆23Updated 3 years ago
- RISC-V ISA based 32-bit processor written in HLS☆17Updated 5 years ago
- A simple cycle accurate template model for ASIC/FPGA hardware design. Including a cycle accurate FIFO design example. More designs are co…☆13Updated 5 years ago
- ☆25Updated 5 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆42Updated 2 weeks ago
- SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…☆33Updated 5 months ago
- Fast Floating Point Operators for High Level Synthesis☆20Updated 2 years ago
- 2-8bit weights, 8-bit activations flexible Neural Processing Engine for PULP clusters☆21Updated this week
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆26Updated 4 years ago
- ☆20Updated 2 years ago
- This work implements a dynamic programming algorithm for performing local sequence alignment. Through parallelism, it can run 136X times …☆23Updated 5 years ago
- ☆42Updated 5 years ago
- A Reconfigurable Accelerator for Deep Convolutional Neural Networks Implemented by Chisel3.☆28Updated 3 years ago
- CNN accelerator☆27Updated 7 years ago
- A simple cycle-accurate DaDianNao simulator☆13Updated 5 years ago
- ☆23Updated 2 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆20Updated 2 years ago