Alternatives and similar repositories for tinyTPU

Users that are interested in tinyTPU are comparing it to the libraries listed below

• IBM / AccDNN
  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
  ☆437Updated 6 years ago
• cameronshinn / tiny-tpu
  Small-scale Tensor Processing Unit built on an FPGA
  ☆219Updated 6 years ago
• spcl / gemm_hls
  Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
  ☆374Updated last year
• embedeep / Free-TPU
  Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…
  ☆272Updated 2 years ago
• pulp-platform / ara
  The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …
  ☆485Updated 2 months ago
• sld-columbia / esp
  Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
  ☆402Updated this week
• openhwgroup / cvfpu
  Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
  ☆568Updated 3 months ago
• abdelazeem201 / Systolic-array-implementation-in-RTL-for-TPU
  IC implementation of Systolic Array for TPU
  ☆330Updated last year
• dawsonjon / fpu
  synthesiseable ieee 754 floating point library in verilog
  ☆717Updated 2 years ago
• LeiWang1999 / ZYNQ-NVDLA
  NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
  ☆383Updated 2 years ago
• intel / fpga-npu
  ☆240Updated last year
• ucb-bar / gemmini
  Berkeley's Spatial Array Generator
  ☆1,215Updated this week
• fpgasystems / spooNN
  FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)
  ☆282Updated 6 years ago
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆166Updated 8 years ago
• pulp-platform / pulpissimo
  This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no…
  ☆457Updated 8 months ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆242Updated 5 months ago
• Xilinx / Vitis-HLS-Introductory-Examples
  ☆758Updated 2 weeks ago
• Xilinx / Vitis_Accel_Examples
  Vitis_Accel_Examples
  ☆582Updated last month
• cxdzyq1110 / NPU_on_FPGA
  在FPGA上面实现一个NPU计算单元。能够执行矩阵运算（ADD/ADDi/ADDs/MULT/MULTi/DOT等）、图像处理运算（CONV/POOL等）、非线性映射（RELU/TANH/SIGM等）。
  ☆293Updated 7 years ago
• drichmond / RISC-V-On-PYNQ
  RISC-V Integration for PYNQ
  ☆180Updated 6 years ago
• AniketBadhan / Convolutional-Neural-Network
  Implementation of CNN using Verilog
  ☆241Updated 8 years ago
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆334Updated last year
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆214Updated last month
• aliemo / transfomers-silicon-research
  Research and Materials on Hardware implementation of Transformer Model
  ☆298Updated 11 months ago
• pulp-platform / pulp
  This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain a…
  ☆539Updated last year
• thedatabusdotio / fpga-ml-accelerator
  This repository hosts the code for an FPGA based accelerator for convolutional neural networks
  ☆180Updated last year
• Xilinx / finn-examples
  Dataflow QNN inference accelerator examples on FPGAs
  ☆243Updated 5 months ago
• Xilinx / PYNQ_Workshop
  ☆464Updated last year
• embedeep / FREE-TPU-V3plus-for-FPGA
  FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference
  ☆170Updated 2 years ago
• bespoke-silicon-group / basejump_stl
  BaseJump STL: A Standard Template Library for SystemVerilog
  ☆641Updated 3 weeks ago