Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA), with self-driving accelerated
☆238Dec 22, 2025Updated 8 months ago
Alternatives and similar repositories for soDLA
Users that are interested in soDLA are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Learn NVDLA by SOMNIA☆42Dec 13, 2019Updated 6 years ago
- NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…☆233Dec 18, 2018Updated 7 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆166Jan 16, 2022Updated 4 years ago
- ☆49Nov 18, 2019Updated 6 years ago
- Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel☆224Jan 23, 2020Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions☆211Jun 25, 2020Updated 6 years ago
- NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.☆392Dec 27, 2023Updated 2 years ago
- ☆42Oct 26, 2021Updated 4 years ago
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)☆25Feb 1, 2020Updated 6 years ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆146Nov 16, 2017Updated 8 years ago
- ☆22Oct 15, 2018Updated 7 years ago
- RTL, Cmodel, and testbench for NVDLA☆2,147Mar 2, 2022Updated 4 years ago
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- Express DLA implementation for FPGA, revised based on NVDLA.☆11Oct 17, 2019Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Open Neural Network Compiler☆531Aug 22, 2023Updated 3 years ago
- Wrapper for ETH Ariane Core☆21Sep 2, 2025Updated last year
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,379Aug 19, 2026Updated 2 weeks ago
- ☆84Jun 1, 2022Updated 4 years ago
- OpenDLA for trying the demo and FPGA solution☆17Jul 28, 2022Updated 4 years ago
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆166Jan 25, 2024Updated 2 years ago
- Systolic-array based Deep Learning Accelerator generator☆29Dec 11, 2020Updated 5 years ago
- Provides dot visualizations of chisel/firrtl circuites☆13Mar 12, 2019Updated 7 years ago
- ☆17Oct 2, 2019Updated 6 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Berkeley's Spatial Array Generator☆1,449Updated this week
- Comment on the rocket-chip source code☆179Oct 19, 2018Updated 7 years ago
- eyeriss-chisel3☆40May 2, 2022Updated 4 years ago
- FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility☆1,039Updated this week
- ☆46Mar 31, 2025Updated last year
- ☆111Oct 19, 2018Updated 7 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆202Dec 15, 2017Updated 8 years ago
- A Zero Cost Abstruction of FSM(Finite State Machine) circuits based on chisel3.☆13Oct 8, 2021Updated 4 years ago
- A prototype GUI for chisel-development☆51Jun 9, 2020Updated 6 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- A Library of Chisel3 Tools for Digital Signal Processing☆250Apr 29, 2024Updated 2 years ago
- HW/SW co-design of sentence-level energy optimizations for latency-aware multi-task NLP inference☆54Mar 24, 2024Updated 2 years ago
- ☆24Feb 11, 2021Updated 5 years ago
- SmartNIC☆14Dec 13, 2018Updated 7 years ago
- Chisel Things for OFDM☆33Jul 1, 2020Updated 6 years ago
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆66Oct 5, 2017Updated 8 years ago
- Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy☆423Aug 25, 2026Updated last week