A 32-bit out-of-order RISC-V superscalar for Xilinx FPGAs.
☆15Jan 14, 2022Updated 4 years ago
Alternatives and similar repositories for falco
Users that are interested in falco are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- MAC system with IEEE754 compatibility☆13Nov 22, 2023Updated 2 years ago
- Aquila: a 32-bit RISC-V processor for Xilinx FPGAs.☆38Oct 25, 2023Updated 2 years ago
- A MIPS CPU with dual-issue, out-of-order, and 5-stage pipelines☆11Nov 28, 2019Updated 6 years ago
- A trivial riscv cpu with tomasulo algorithm implemented in Verilog HDL. Support out-of-order execution and pipline and can run in FPGA wi…☆16Jan 4, 2020Updated 6 years ago
- a hardware task scheduler design☆10Sep 14, 2022Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Hardware Description Language on FPGA☆10Sep 18, 2023Updated 2 years ago
- Designing a Multi-Agent Fabric Integration Architecture to run on de10-lite FPGA.☆18Apr 28, 2026Updated 3 weeks ago
- A simple superscalar out-of-order RISC-V microprocessor☆248Feb 24, 2025Updated last year
- a verilog snake game program☆10Oct 13, 2022Updated 3 years ago
- 陽明交通大學/台灣大學 修課心得😀☆13Jul 7, 2024Updated last year
- DUTH RISC-V Superscalar Microprocessor☆35Oct 23, 2024Updated last year
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆17Updated this week
- Implementation of a binary search tree algorithm in a FPGA/ASIC IP☆21Sep 5, 2021Updated 4 years ago
- Reconfigurable Binary Engine☆17Mar 23, 2021Updated 5 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- SystemVerilog overhaul of ESP L2 and LLC caches with directory based protocol☆19Feb 27, 2025Updated last year
- ☆56Jul 2, 2023Updated 2 years ago
- RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT☆187Apr 4, 2026Updated last month
- Designing Video Game Hardware in Verilog☆28Jan 5, 2020Updated 6 years ago
- Transforms an image into an ASCII style colored text on your terminal.☆26Jun 22, 2017Updated 8 years ago
- A simple risc-v CPU /GPU running on an Arty A7-100T FPGA board☆33Jun 30, 2021Updated 4 years ago
- DUTH RISC-V Microprocessor☆26Apr 5, 2026Updated last month
- This repo is for Edge Vision SoC framework, which facilitates quick porting of users' design for Edge AI and Vision solutions.☆29Feb 13, 2026Updated 3 months ago
- RISCV core RV32I/E.4 threads in a ring architecture☆33Jun 12, 2023Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.☆235Aug 25, 2020Updated 5 years ago
- [NYCU 2021 Spring] Digital Circuits and Systems☆30Jan 26, 2024Updated 2 years ago
- UVM components for DSP tasks (MODulation/DEModulation)☆16Mar 2, 2022Updated 4 years ago
- ☆10May 12, 2022Updated 4 years ago
- ☆33Nov 25, 2022Updated 3 years ago
- ☆29Oct 20, 2019Updated 6 years ago
- Repo for PyChart 1.39, refs http://download.gna.org/pychart/☆10Sep 29, 2014Updated 11 years ago
- nextpnr portable FPGA place and route tool☆11Nov 30, 2020Updated 5 years ago
- ASIC Design lab. Pipelined, Cached, Multicore MIPS Processor☆11Aug 23, 2017Updated 8 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ☆10Apr 8, 2021Updated 5 years ago
- Code for Smashing Magazine article about rendering SVG with React☆13Jan 14, 2016Updated 10 years ago
- Wraps the NVDLA project for Chipyard integration☆24Sep 2, 2025Updated 8 months ago
- OpenTitan: Open source silicon root of trust☆10Feb 5, 2020Updated 6 years ago
- Alpha64 R10000 Two-Way Superscalar Processor☆12May 6, 2019Updated 7 years ago
- ☆20Jul 3, 2025Updated 10 months ago
- The MiBench testsuite, extended for use in general embedded environments☆14Oct 20, 2018Updated 7 years ago