SPI Master Core clone from OpenCores
☆12Oct 4, 2013Updated 12 years ago
Alternatives and similar repositories for spi
Users that are interested in spi are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 11 years ago
- FSM (Finite State Machine) tools for Verilog HDL.☆13Dec 19, 2022Updated 3 years ago
- UVM agents☆86May 26, 2017Updated 8 years ago
- Formal Verification of RISC V IM Processor☆10Mar 27, 2022Updated 3 years ago
- Graphviz dot to Verilog Finite State Machine (FSM) generator written in Python☆15Feb 3, 2021Updated 5 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- The open- MSP430 is an open-source 16-bit microcontroller core written in Verilog, that is compatible with the Texas Instruments MSP430 m…☆17Jan 28, 2022Updated 4 years ago
- I2C controller core☆16Jun 1, 2022Updated 3 years ago
- VGA LCD Core (OpenCores)☆14May 22, 2018Updated 7 years ago
- Generate a Verilog Source file and testbench file for a given Moore FSM☆17Nov 18, 2012Updated 13 years ago
- Small and simple, primitive SoC with GPU, CPU, RAM, GPIO☆14Dec 29, 2016Updated 9 years ago
- ☆12Sep 23, 2024Updated last year
- A collection of debugging busses developed and presented at zipcpu.com☆43Jan 18, 2024Updated 2 years ago
- WISHBONE Interconnect☆11Oct 1, 2017Updated 8 years ago
- This fork family includes the 6502 upgraded to 32-bit address bus, in Verilog HDL☆20Feb 23, 2020Updated 6 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- CNN implementation based FPGA☆16Apr 8, 2019Updated 6 years ago
- AHB3-Lite to Wishbone Bridge☆13Mar 26, 2019Updated 6 years ago
- A wishbone controlled PWM (audio) controller☆18Jan 16, 2024Updated 2 years ago
- The CORDIC algorithm implemented in Octave/MATLAB and Verilog☆32Mar 31, 2015Updated 10 years ago
- Connecting FPGA and Arduino using SPI.☆25Apr 30, 2022Updated 3 years ago
- Linrad - SDR receiver☆15Nov 22, 2025Updated 4 months ago
- Experiments for iCEstick evaluation board with iCE40HX-1k FPGA - using open source toolchain☆13Nov 24, 2015Updated 10 years ago
- A collection of classes to drive motors directly connected to a Raspberry Pi, with smart feedback control☆12Nov 9, 2018Updated 7 years ago
- Repository for holding all CCSDS MO Training documentation, examples, tutorials and issue lists☆14Jul 30, 2019Updated 6 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- This repository provides the implementation of the method proposed in our paper "Pruning Deep Neural Networks using Partial Least Squares…☆26Aug 21, 2020Updated 5 years ago
- MS-DOS 4.0 fork, with tweaks to make it run on the Envy OS as a subsystem.☆17May 22, 2024Updated last year
- CORDIC VLSI-IP for deep learning activation functions☆15Jul 13, 2019Updated 6 years ago
- implement convolution neural network on FPGA based on VHDL design☆28Oct 8, 2021Updated 4 years ago
- The SoC Design for Time-Sensitive Networking (TSN)☆22Dec 5, 2025Updated 3 months ago
- Scratch2.0二次开发版，封装了常用的功能，只需简单js基础，方便集成到现有的系统。You can easy embed scratch to your website with config and javascript☆17Jan 22, 2020Updated 6 years ago
- WISHBONE DMA/Bridge IP Core☆18Jul 17, 2014Updated 11 years ago
- Bootstrapping Fedora on RISC-V☆29Mar 10, 2018Updated 8 years ago
- ☆14Jul 5, 2019Updated 6 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Source Code for 'Numerical C' by Philip Joyce☆20Jun 25, 2019Updated 6 years ago
- Simple SPI interface for FPGAs☆13Feb 8, 2014Updated 12 years ago
- Project in Course named DESIGN AND IMPLEMENTATION OF COMMUNICATION PROTOCOLS in FCU☆15Oct 18, 2014Updated 11 years ago
- ☆10Apr 8, 2021Updated 4 years ago
- openMSP430 CPU core (from OpenCores)☆22Oct 14, 2022Updated 3 years ago
- The memory model was leveraged from micron.☆29Mar 24, 2018Updated 8 years ago
- Mirror of software for use with XGecu and Autoelectric's line of chip programmers (TL866A, TL866CS, TL866II Plus, T56)☆17Jun 24, 2023Updated 2 years ago