Alternatives and similar repositories for pzbcm

Users that are interested in pzbcm are comparing it to the libraries listed below

• munetomo-maruyama / mmRISC-1
  RISC-V RV32IMAFC Core for MCU
  ☆39Updated 8 months ago
• grayresearch / CX
  Proposed RISC-V Composable Custom Extensions Specification
  ☆70Updated 4 months ago
• pulp-platform / morty
  A SystemVerilog source file pickler.
  ☆60Updated last year
• antmicro / topwrap
  A Python package for generating HDL wrappers and top modules for HDL sources
  ☆38Updated this week
• efabless / sky130_sram_macros_old
  ☆38Updated 3 years ago
• taichi-ishitani / rice
  ☆20Updated last month
• varunnagpaal / Digital-Hardware-Modelling
  Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
  ☆67Updated 8 months ago
• YosysHQ-GmbH / SVA-AXI4-FVIP
  YosysHQ SVA AXI Properties
  ☆43Updated 2 years ago
• chipsalliance / uvm-verilator
  ☆99Updated 2 years ago
• pulp-platform / tech_cells_generic
  Technology dependent cells instantiated in the design for generic process (simulation, FPGA)
  ☆67Updated last month
• RoaLogic / plic
  Platform Level Interrupt Controller
  ☆43Updated last year
• pulp-platform / axi_riscv_atomics
  AXI Adapter(s) for RISC-V Atomic Operations
  ☆66Updated last month
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆50Updated 6 months ago
• pulp-platform / axi_llc
  ☆30Updated last month
• StanfordVLSI / dragonphy2
  Open Source PHY v2
  ☆31Updated last year
• verilator / uvm
  Universal Verification Methodology (UVM) base libraries, with edits for Verilator
  ☆26Updated 2 weeks ago
• rggen / rggen-sv-rtl
  Common SystemVerilog RTL modules for RgGen
  ☆13Updated last month
• bespoke-silicon-group / bsg_sv2v
  A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.
  ☆43Updated 2 years ago
• openhwgroup / cva5
  The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.
  ☆121Updated 3 months ago
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆51Updated 2 years ago
• aignacio / nox
  RISC-V Nox core
  ☆68Updated 3 months ago
• aolofsson / POSH
  ☆44Updated 5 years ago
• pulp-platform / svase
  ☆32Updated 9 months ago
• tenstorrent / cosim-arch-checker
  Framework to perform DUT vs ISS (Whisper) lockstep architectural checks
  ☆20Updated last week
• pulp-platform / cheshire-ihp130-o
  ☆57Updated 6 months ago
• maltanar / axi-in-chisel
  Examples for creating AXI-interfaced peripherals in Chisel
  ☆76Updated 9 years ago
• waviousllc / wav-lpddr-hw
  Wavious DDR (WDDR) Physical interface (PHY) Hardware
  ☆116Updated 4 years ago
• openhwgroup / cv-hpdcache
  RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores
  ☆92Updated 2 months ago
• verilator / example-systemverilog
  ☆40Updated last year
• Intuity / nexus
  Open source RTL simulation acceleration on commodity hardware
  ☆30Updated 2 years ago