HeteroCL-MLIR dialect for accelerator design
☆42Sep 18, 2024Updated last year
Alternatives and similar repositories for hcl-dialect
Users that are interested in hcl-dialect are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A stream to RTL compiler based on MLIR and CIRCT☆16Nov 15, 2022Updated 3 years ago
- Allo Accelerator Design and Programming Framework (PLDI'24)☆388Jun 19, 2026Updated 2 weeks ago
- Bridging polyhedral analysis tools to the MLIR framework☆119Sep 9, 2023Updated 2 years ago
- 📥 🎯 (1,4/4) an MLIR-based toolchain with Vitis HLS LLVM input/output targeting FPGAs.☆15Nov 15, 2022Updated 3 years ago
- HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing (FPGA'19 Best Paper)☆339Apr 20, 2024Updated 2 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆55Jul 17, 2023Updated 2 years ago
- PyLog: An Algorithm-Centric FPGA Programming and Synthesis Flow☆69May 9, 2023Updated 3 years ago
- A scalable High-Level Synthesis framework on MLIR☆299May 15, 2024Updated 2 years ago
- DRA+RISC-V Exploration Framework☆22Jan 8, 2024Updated 2 years ago
- A hardware synthesis framework with multi-level paradigm☆45Jan 10, 2025Updated last year
- PyTorch compilation tutorial covering TorchScript, torch.fx, and Slapo☆17Mar 13, 2023Updated 3 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆67Oct 9, 2024Updated last year
- A polyhedral compiler for hardware accelerators☆59Jul 24, 2024Updated last year
- ☆12Jul 20, 2022Updated 3 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- ☆24Nov 10, 2020Updated 5 years ago
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated 2 years ago
- A lightweight, Pythonic, frontend for MLIR☆80Oct 21, 2023Updated 2 years ago
- ☆16Updated this week
- DASS HLS Compiler☆31Oct 4, 2023Updated 2 years ago
- IREE plugin repository for the AMD AIE accelerator☆132Updated this week
- Data-Centric MLIR dialect☆47Oct 16, 2023Updated 2 years ago
- ☆87Mar 5, 2024Updated 2 years ago
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained. Community-maintained version with binar…☆192Mar 8, 2026Updated 3 months ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- MLIR Sample dialect☆138Dec 23, 2025Updated 6 months ago
- EQueue Dialect☆43Feb 3, 2022Updated 4 years ago
- ACM TODAES Best Paper Award, 2022☆35Oct 24, 2023Updated 2 years ago
- Benchmark PyTorch Custom Operators☆14Jul 6, 2023Updated 2 years ago
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆63Mar 17, 2022Updated 4 years ago
- Accelerating SSSP for power-law graphs using an FPGA.☆23Mar 29, 2022Updated 4 years ago
- A translator from c to MLIR☆33Nov 15, 2021Updated 4 years ago
- An MLIR-based compiler framework bridges DSLs (domain-specific languages) to DSAs (domain-specific architectures).☆735Updated this week
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆101Sep 27, 2024Updated last year
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆17Feb 3, 2023Updated 3 years ago
- ☆63Aug 4, 2023Updated 2 years ago
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆38Jan 16, 2025Updated last year
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Aug 5, 2022Updated 3 years ago
- Conversions to MLIR EmitC☆135Dec 12, 2024Updated last year
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆95Jul 26, 2024Updated last year
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Aug 22, 2021Updated 4 years ago