cornell-zhang / hcl-dialect
HeteroCL-MLIR dialect for accelerator design
☆40Updated 7 months ago
Alternatives and similar repositories for hcl-dialect:
Users that are interested in hcl-dialect are comparing it to the libraries listed below
- Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)☆31Updated 11 months ago
- Polyhedral High-Level Synthesis in MLIR☆30Updated 2 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆58Updated 6 months ago
- EQueue Dialect☆40Updated 3 years ago
- agile hardware-software co-design☆46Updated 3 years ago
- Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)☆40Updated 2 weeks ago
- Bridging polyhedral analysis tools to the MLIR framework☆109Updated last year
- ☆58Updated this week
- 📥 🎯 (1,4/4) an MLIR-based toolchain with Vitis HLS LLVM input/output targeting FPGAs.☆13Updated 2 years ago
- ☆91Updated last year
- ☆41Updated this week
- Code base for OOPSLA'24 paper: UniSparse: An Intermediate Language for General Sparse Format Customization☆30Updated 5 months ago
- A graph linear algebra overlay☆51Updated 2 years ago
- ☆95Updated this week
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆49Updated last year
- ☆18Updated last week
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆19Updated last year
- A hardware synthesis framework with multi-level paradigm☆38Updated 3 months ago
- Data-Centric MLIR dialect☆41Updated last year
- Xilinx Modifications to Halide☆12Updated 4 years ago
- Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC☆26Updated last month
- ☆50Updated last month
- Example for running IREE in a bare-metal Arm environment.☆33Updated 2 months ago
- A Language for Closed-form High-level ARchitecture Modeling☆20Updated 5 years ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆90Updated 7 months ago
- SparseP is the first open-source Sparse Matrix Vector Multiplication (SpMV) software package for real-world Processing-In-Memory (PIM) ar…☆73Updated 2 years ago
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆23Updated 5 months ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- ☆24Updated 4 years ago
- ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)☆24Updated this week