HeteroCL-MLIR dialect for accelerator design
☆42Sep 18, 2024Updated last year
Alternatives and similar repositories for hcl-dialect
Users that are interested in hcl-dialect are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A stream to RTL compiler based on MLIR and CIRCT☆16Nov 15, 2022Updated 3 years ago
- Allo Accelerator Design and Programming Framework (PLDI'24)☆374Mar 13, 2026Updated last month
- Bridging polyhedral analysis tools to the MLIR framework☆119Sep 9, 2023Updated 2 years ago
- 📥 🎯 (1,4/4) an MLIR-based toolchain with Vitis HLS LLVM input/output targeting FPGAs.☆15Nov 15, 2022Updated 3 years ago
- HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing (FPGA'19 Best Paper)☆338Apr 20, 2024Updated 2 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆55Jul 17, 2023Updated 2 years ago
- PyLog: An Algorithm-Centric FPGA Programming and Synthesis Flow☆69May 9, 2023Updated 2 years ago
- A scalable High-Level Synthesis framework on MLIR☆296May 15, 2024Updated last year
- DRA+RISC-V Exploration Framework☆19Jan 8, 2024Updated 2 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆65Oct 9, 2024Updated last year
- A hardware synthesis framework with multi-level paradigm☆44Jan 10, 2025Updated last year
- PyTorch compilation tutorial covering TorchScript, torch.fx, and Slapo☆17Mar 13, 2023Updated 3 years ago
- A polyhedral compiler for hardware accelerators☆59Jul 24, 2024Updated last year
- ☆12Jul 20, 2022Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆24Nov 10, 2020Updated 5 years ago
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated last year
- A lightweight, Pythonic, frontend for MLIR☆80Oct 21, 2023Updated 2 years ago
- ☆16Updated this week
- DASS HLS Compiler☆31Oct 4, 2023Updated 2 years ago
- IREE plugin repository for the AMD AIE accelerator☆128Apr 27, 2026Updated last week
- Data-Centric MLIR dialect☆47Oct 16, 2023Updated 2 years ago
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained. Community-maintained version with binar…☆188Mar 8, 2026Updated last month
- ☆87Mar 5, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- MLIR Sample dialect☆138Dec 23, 2025Updated 4 months ago
- EQueue Dialect☆42Feb 3, 2022Updated 4 years ago
- ACM TODAES Best Paper Award, 2022☆34Oct 24, 2023Updated 2 years ago
- Benchmark PyTorch Custom Operators☆14Jul 6, 2023Updated 2 years ago
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆62Mar 17, 2022Updated 4 years ago
- An MLIR-based compiler framework bridges DSLs (domain-specific languages) to DSAs (domain-specific architectures).☆713Apr 29, 2026Updated last week
- Accelerating SSSP for power-law graphs using an FPGA.☆23Mar 29, 2022Updated 4 years ago
- A translator from c to MLIR☆33Nov 15, 2021Updated 4 years ago
- ☆62Aug 4, 2023Updated 2 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆99Sep 27, 2024Updated last year
- ☆17Feb 3, 2023Updated 3 years ago
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆37Jan 16, 2025Updated last year
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Aug 5, 2022Updated 3 years ago
- Conversions to MLIR EmitC☆135Dec 12, 2024Updated last year
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Aug 22, 2021Updated 4 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆94Jul 26, 2024Updated last year