Alternatives and similar repositories for soda-opt

Users that are interested in soda-opt are comparing it to the libraries listed below

• ecolab-nus / morpher
  An Open-Source Tool for CGRA Accelerators
  ☆76Updated 2 months ago
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆64Updated last year
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆61Updated 8 months ago
• pku-dasys / pillars
  An integrated CGRA design framework
  ☆91Updated 8 months ago
• StanfordAHA / aha
  ☆61Updated this week
• ecolab-nus / morpher-v2
  An Open-Source Tool for CGRA Accelerators
  ☆25Updated 2 months ago
• tancheng / CGRA-Mapper
  An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.
  ☆80Updated last week
• tancheng / CGRA-Flow
  CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
  ☆145Updated 2 weeks ago
• UCLA-VAST / Stream-HLS
  An MLIR Complier for PyTorch/C/C++ Codes into HLS Dataflow Designs
  ☆54Updated 4 months ago
• pnnl / OpenCGRA
  OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.
  ☆163Updated 2 years ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆82Updated 4 years ago
• sharc-lab / LightningSim
  A fast, accurate trace-based simulator for High-Level Synthesis.
  ☆72Updated 8 months ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆64Updated 5 months ago
• lana555 / dynamatic
  ☆87Updated last year
• UCLA-VAST / tapa
  TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.
  ☆176Updated 3 months ago
• hngenc / stellar
  ☆32Updated last year
• esl-epfl / OpenEdgeCGRA
  An Open-Hardware CGRA for accelerated computation on the edge.
  ☆38Updated last month
• MPSLab-ASU / ccf
  CGRA Compilation Framework
  ☆88Updated 2 years ago
• pku-liang / Hector
  A hardware synthesis framework with multi-level paradigm
  ☆42Updated 10 months ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆91Updated last year
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• VeriGOOD-ML / public
  ☆64Updated 7 months ago
• tancheng / VectorCGRA
  CGRA framework with vectorization support.
  ☆41Updated last week
• spcl / rapidchiplet
  A toolchain for rapid design space exploration of chiplet architectures
  ☆67Updated 4 months ago
• arc-research-lab / CHARM
  CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture
  ☆163Updated this week
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆83Updated 2 years ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆72Updated last year
• andrewboutros / rad-flow
  The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…
  ☆38Updated 4 months ago
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆69Updated 2 months ago
• arc-research-lab / AIM
  AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…
  ☆25Updated 6 months ago