Research about dataflow architecture
☆12Nov 30, 2023Updated 2 years ago
Alternatives and similar repositories for dataflow_architecture
Users that are interested in dataflow_architecture are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- PyTorch compilation tutorial covering TorchScript, torch.fx, and Slapo☆17Mar 13, 2023Updated 3 years ago
- An Open-Source Tool for CGRA Accelerators☆82Mar 30, 2026Updated last week
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆65Oct 9, 2024Updated last year
- Guichan is a C++ GUI library designed for games.☆14Oct 22, 2025Updated 5 months ago
- A Framework for Hardware-Aware LLM Exploration☆37Mar 20, 2026Updated 3 weeks ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- ☆13May 15, 2025Updated 10 months ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆156Feb 18, 2026Updated last month
- ☆13Dec 9, 2024Updated last year
- The programming runtime and interfaces for ARENA.☆14Sep 14, 2021Updated 4 years ago
- ☆40Dec 28, 2023Updated 2 years ago
- FSA: Fusing FlashAttention within a Single Systolic Array☆99Updated this week
- ☆10Dec 17, 2025Updated 3 months ago
- Cilk application benchmark programs☆11Aug 20, 2022Updated 3 years ago
- - A 1X3 Router (capable of routing the data packets to three different clients form a single source network) was designed, including a re…☆11Jun 3, 2019Updated 6 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- for paper @ ASPLOS‘25’☆16Mar 27, 2025Updated last year
- Examples and training code for Machine Learning samples that can be run on various Edge devices☆10Jan 8, 2025Updated last year
- Fully Homomorphic Encryption Compiler☆18Jan 27, 2025Updated last year
- ☆17Apr 16, 2024Updated last year
- An almost empty chisel project as a starting point for hardware design☆35Jan 27, 2025Updated last year
- Hardware Accelerated MWPM decoder for Quantum Error Correction☆19Mar 23, 2025Updated last year
- A DAG processor and compiler for a tree-based spatial datapath.☆16Aug 24, 2022Updated 3 years ago
- ☆10Sep 7, 2023Updated 2 years ago
- Here are some implementations of basic hardware units in RTL language (verilog for now), which can be used for area/power evaluation and …☆14Aug 25, 2023Updated 2 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- ☆17Feb 24, 2025Updated last year
- Zircon CPU in 2024☆12Nov 21, 2025Updated 4 months ago
- LibArgus and CUDA interaction Libraries, Samples, and Demos☆13Jan 12, 2023Updated 3 years ago
- 中国科学院大学2022秋季学期智能计算系统实验-陈云霁☆11Jan 3, 2023Updated 3 years ago
- Customized Inference Engine for Multiverse Models☆25Jun 27, 2025Updated 9 months ago
- This tools offer many simulation of memory design detail parameter. Then you can setting these parameter to running result in your condit…☆17May 30, 2016Updated 9 years ago
- 一个基于AXI接口的PL端卷积加速器，可由PS端调用☆12Apr 15, 2023Updated 2 years ago
- Open deep learning compiler stack for cpu, gpu and specialized accelerators☆19Apr 1, 2026Updated last week
- Frequently updated list of dLLM (Diffusion Large Language Models) papers, models, and other resources☆25Mar 31, 2026Updated last week
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- Understanding Deep Learning☆11Jul 23, 2024Updated last year
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆23Oct 9, 2020Updated 5 years ago
- Python C++ Code Manager☆15Sep 29, 2024Updated last year
- Seal5 - Semi-automated LLVM Support for RISC-V Extensions including Autovectorization☆26Mar 29, 2026Updated last week
- Systolic array based hardware for Image processing on the SPARTAN-6 FPGA☆13May 26, 2016Updated 9 years ago
- [ASICON'25] User-friendly lithography simulation engine for full-chip scale mask optimization☆41Dec 17, 2025Updated 3 months ago
- ASIC simulation of Multi-ported Memory Module. And it can offer SRAM-based dual-port basic building block to support multiple read/write …☆23May 30, 2016Updated 9 years ago