cucapra / EventQueue
EQueue Dialect
☆40Updated 3 years ago
Alternatives and similar repositories for EventQueue:
Users that are interested in EventQueue are comparing it to the libraries listed below
- agile hardware-software co-design☆46Updated 3 years ago
- ☆25Updated 3 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆58Updated 6 months ago
- Release of stream-specialization software/hardware stack.☆121Updated 2 years ago
- ☆50Updated last month
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 3 years ago
- ☆25Updated last year
- ☆91Updated last year
- Benchmarks for Accelerator Design and Customized Architectures☆121Updated 5 years ago
- A reference implementation of the Mind Mappings Framework.☆29Updated 3 years ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆90Updated 7 months ago
- Stencil with Optimized Dataflow Architecture Compiler☆16Updated 5 years ago
- ☆33Updated 3 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆71Updated 6 years ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆64Updated 10 months ago
- A graph linear algebra overlay☆51Updated 2 years ago
- A high-level performance analysis tool for FPGA-based accelerators☆20Updated 7 years ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆30Updated 3 years ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆53Updated 3 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆65Updated 3 years ago
- ☆27Updated 6 months ago
- STONNE Simulator integrated into SST Simulator☆19Updated last year
- A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.☆18Updated 2 years ago
- A hardware synthesis framework with multi-level paradigm☆38Updated 3 months ago
- ☆23Updated 4 years ago
- ☆35Updated 4 years ago
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆56Updated 3 years ago
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- ☆58Updated this week