Alternatives and similar repositories for EventQueue

Users that are interested in EventQueue are comparing it to the libraries listed below

• PolyArch / dsa-framework
  Release of stream-specialization software/hardware stack.
  ☆119Updated 2 years ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆61Updated 8 months ago
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆64Updated last year
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆83Updated 2 years ago
• TeCSAR-UNCC / gem5-SALAM
  ☆107Updated last year
• pku-liang / HASCO
  agile hardware-software co-design
  ☆52Updated 3 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆47Updated 3 years ago
• cornell-zhang / GraphLily
  A graph linear algebra overlay
  ☆51Updated 2 years ago
• kartik-hegde / mindmappings
  A reference implementation of the Mind Mappings Framework.
  ☆30Updated 4 years ago
• Xilinx / merlin-compiler
  ☆60Updated 2 years ago
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆82Updated 6 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆96Updated last year
• he-actlab / planaria.code
  ☆29Updated 4 years ago
• PolyArch / gem-forge-framework
  ☆26Updated 2 years ago
• baichen318 / arch-explorer
  ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis
  ☆34Updated last year
• esa-tu-darmstadt / spn-compiler
  Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.
  ☆24Updated last year
• maestro-project / confuciux
  ☆32Updated 4 years ago
• StanfordAHA / aha
  ☆61Updated this week
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆65Updated 4 years ago
• MPSLab-ASU / ccf
  CGRA Compilation Framework
  ☆88Updated 2 years ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆72Updated last year
• pku-liang / TensorLib
  A Spatial Accelerator Generation Framework for Tensor Algebra.
  ☆60Updated 4 years ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 3 years ago
• hngenc / stellar
  ☆32Updated last year
• PrincetonUniversity / MosaicSim
  Heterogeneous simulator for DECADES Project
  ☆32Updated last year
• pku-liang / Hector
  A hardware synthesis framework with multi-level paradigm
  ☆41Updated 10 months ago
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆82Updated 6 years ago
• stonne-simulator / sst-elements-with-stonne
  STONNE Simulator integrated into SST Simulator
  ☆22Updated last year
• UCLA-VAST / soda-compiler
  Stencil with Optimized Dataflow Architecture Compiler
  ☆17Updated 5 years ago
• sharc-lab / LightningSim
  A fast, accurate trace-based simulator for High-Level Synthesis.
  ☆72Updated 8 months ago