CristianTirelli / SAT-MapItLinks
☆14Updated 3 months ago
Alternatives and similar repositories for SAT-MapIt
Users that are interested in SAT-MapIt are comparing it to the libraries listed below
Sorting:
- The Chronos FPGA Framework to accelerate ordered applications☆22Updated 5 years ago
- ☆87Updated last year
- ☆16Updated this week
- A fast, accurate trace-based simulator for High-Level Synthesis.☆74Updated last month
- ☆56Updated 6 months ago
- CGRA Compilation Framework☆91Updated 2 years ago
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.☆177Updated 5 months ago
- ☆62Updated this week
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Updated 3 years ago
- An MLIR Complier for PyTorch/C/C++ Codes into HLS Dataflow Designs☆58Updated 5 months ago
- ☆62Updated 10 months ago
- A low power platform based on X-HEEP and integrating the ESL-CGRA☆17Updated 2 months ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆152Updated last week
- An Open-Source Tool for CGRA Accelerators☆82Updated 4 months ago
- A Scalable BFS Accelerator on FPGA-HBM Platform☆13Updated 4 years ago
- An integrated CGRA design framework☆91Updated 10 months ago
- ☆13Updated last year
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆64Updated last year
- A portable framework to map DFG (dataflow graph, representing an application) on spatial accelerators.☆40Updated 3 years ago
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆48Updated 2 weeks ago
- Benchmarks for Accelerator Design and Customized Architectures☆136Updated 5 years ago
- High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing☆53Updated last year
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆74Updated last year
- An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.☆79Updated 3 weeks ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆92Updated last year
- An Open-Source Tool for CGRA Accelerators☆28Updated 4 months ago
- ☆18Updated 3 years ago
- ☆60Updated 2 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆91Updated 9 months ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year