Alternatives and similar repositories for VectorCGRA:

Users that are interested in VectorCGRA are comparing it to the libraries listed below

• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆58Updated 6 months ago
• tancheng / CGRA-Mapper
  An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.
  ☆66Updated this week
• tancheng / CGRA-Flow
  CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
  ☆122Updated this week
• yhqiu16 / TRAM
  Template-based Reconfigurable Architecture Modeling Framework
  ☆14Updated 2 years ago
• tancheng / CGRA-Bench
  ☆15Updated 2 years ago
• lana555 / dynamatic
  ☆86Updated last year
• ecolab-nus / morpher
  An Open-Source Tool for CGRA Accelerators
  ☆63Updated 3 months ago
• ecolab-nus / morpher-v2
  An Open-Source Tool for CGRA Accelerators
  ☆21Updated 11 months ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆48Updated 3 weeks ago
• esl-epfl / OpenEdgeCGRA
  An Open-Hardware CGRA for accelerated computation on the edge.
  ☆24Updated 7 months ago
• pku-liang / Hector
  A hardware synthesis framework with multi-level paradigm
  ☆38Updated 3 months ago
• pnnl / OpenCGRA
  OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.
  ☆149Updated 2 years ago
• pnnl / soda-opt
  ☆44Updated last month
• pku-dasys / pillars
  An integrated CGRA design framework
  ☆87Updated last month
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆64Updated 9 months ago
• circt-hls / circt-hls
  CIRCT-based HLS compilation flows, debugging, and cosimulation tools.
  ☆49Updated last year
• hngenc / stellar
  ☆26Updated 5 months ago
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆51Updated 5 years ago
• TeCSAR-UNCC / gem5-SALAM
  ☆91Updated last year
• MPSLab-ASU / ccf
  CGRA Compilation Framework
  ☆83Updated last year
• StanfordAHA / aha
  ☆57Updated this week
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆121Updated 5 years ago
• VeriGOOD-ML / public
  ☆59Updated last year
• andrewboutros / rad-flow
  The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…
  ☆33Updated last week
• cornell-brg / pymtl3-net
  Project repo for the POSH on-chip network generator
  ☆45Updated last month
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆71Updated 5 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆90Updated 6 months ago
• Xilinx / merlin-compiler
  ☆57Updated last year
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆74Updated 3 years ago
• cucapra / EventQueue
  EQueue Dialect
  ☆40Updated 3 years ago