Jiawei888 / FPGA-CNN-Accelerator
The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through real-time handwritten digits input and MNIST test data set to verify the correctness and accuracy of the system.
☆10Updated 4 years ago
Alternatives and similar repositories for FPGA-CNN-Accelerator
Users that are interested in FPGA-CNN-Accelerator are comparing it to the libraries listed below
Sorting:
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆24Updated 3 years ago
- Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators☆17Updated last year
- cnn accelerator in vivado HLS☆9Updated 3 years ago
- Sparse CNN Accelerator targeting Intel FPGA☆11Updated 3 years ago
- Low-Precision YOLO on PYNQ with FINN☆31Updated last year
- 2020 xilinx summer school☆17Updated 4 years ago
- Quantized Training for Convolutional Neural Networks using Xilinx Brevitas☆10Updated 3 years ago
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆11Updated 4 years ago
- ☆26Updated 2 years ago
- Open-source of MSD framework☆16Updated last year
- Vitis AI Lab: MNIST classifier☆18Updated 2 years ago
- Workflow for Executing CNN Networks on Zynq Ultrascale+ with VITIS AI. Detailed analysis, configuration, and execution of Convolutional N…☆16Updated last year
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆51Updated 6 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- ☆17Updated 2 years ago
- Codes to implement MobileNet V2 in a FPGA☆25Updated 4 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆36Updated 5 years ago
- ☆26Updated last month
- Some attempts to build CNN on PYNQ.☆24Updated 5 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆93Updated 3 years ago
- CNN Accelerator in Frequency Domain☆12Updated 5 years ago
- An open source Verilog Based LeNet-1 Parallel CNNs Accelerator for FPGAs in Vivado 2017☆15Updated 5 years ago
- A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC☆28Updated 3 years ago
- ☆11Updated 5 years ago
- An HLS based winograd systolic CNN accelerator☆52Updated 3 years ago
- ☆29Updated 3 years ago
- A collection of tutorials for the fpgaConvNet framework.☆39Updated 7 months ago
- A CNN accelerator design inspired by MIT Eyeriss project☆17Updated 3 years ago
- ☆21Updated 2 years ago
- 基于HLS的高效深度卷积神经网络FPGA实现方法☆68Updated 5 years ago