Jiawei888 / FPGA-CNN-AcceleratorLinks
The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through real-time handwritten digits input and MNIST test data set to verify the correctness and accuracy of the system.
☆11Updated 5 years ago
Alternatives and similar repositories for FPGA-CNN-Accelerator
Users that are interested in FPGA-CNN-Accelerator are comparing it to the libraries listed below
Sorting:
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆27Updated 4 years ago
- Sparse CNN Accelerator targeting Intel FPGA☆12Updated 4 years ago
- Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators☆16Updated 2 years ago
- 2020 xilinx summer school☆18Updated 5 years ago
- ☆26Updated 3 years ago
- Codes to implement MobileNet V2 in a FPGA☆28Updated 4 years ago
- ☆21Updated 3 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆52Updated 7 years ago
- A collection of tutorials for the fpgaConvNet framework.☆46Updated last year
- ☆14Updated 3 years ago
- A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC☆28Updated 3 years ago
- ☆17Updated 3 years ago
- Low-Precision YOLO on PYNQ with FINN☆33Updated last year
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆115Updated 4 years ago
- ☆31Updated 7 months ago
- An HLS based winograd systolic CNN accelerator☆54Updated 4 years ago
- ☆10Updated 2 years ago
- FPGA and GPU acceleration of LeNet5☆34Updated 6 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆10Updated 3 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆95Updated 4 years ago
- ☆32Updated 4 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- ☆20Updated 3 years ago
- CNN Accelerator in Frequency Domain☆12Updated 5 years ago
- A CNN accelerator design inspired by MIT Eyeriss project☆20Updated 4 years ago
- Some attempts to build CNN on PYNQ.☆25Updated 6 years ago
- Open-source of MSD framework☆16Updated 2 years ago
- 基于HLS的高效深度卷积神经网络FPGA实现方法☆71Updated 6 years ago
- This project implements a convolution kernel based on vivado HLS on zcu104☆37Updated 5 years ago
- PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs☆33Updated 6 years ago