Jiawei888 / FPGA-CNN-AcceleratorLinks
The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through real-time handwritten digits input and MNIST test data set to verify the correctness and accuracy of the system.
☆11Updated 4 years ago
Alternatives and similar repositories for FPGA-CNN-Accelerator
Users that are interested in FPGA-CNN-Accelerator are comparing it to the libraries listed below
Sorting:
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆24Updated 3 years ago
- Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators☆16Updated 2 years ago
- ☆26Updated 2 years ago
- 2020 xilinx summer school☆17Updated 5 years ago
- ☆14Updated 3 years ago
- Sparse CNN Accelerator targeting Intel FPGA☆12Updated 4 years ago
- Low-Precision YOLO on PYNQ with FINN☆33Updated last year
- ☆28Updated 4 months ago
- ☆21Updated 2 years ago
- A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC☆28Updated 3 years ago
- Open-source of MSD framework☆16Updated last year
- Some attempts to build CNN on PYNQ.☆24Updated 6 years ago
- ☆20Updated 3 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆53Updated 7 years ago
- Codes to implement MobileNet V2 in a FPGA☆27Updated 4 years ago
- A collection of tutorials for the fpgaConvNet framework.☆45Updated 11 months ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆10Updated 3 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆94Updated 3 years ago
- ☆17Updated 2 years ago
- ☆31Updated 3 years ago
- PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs☆32Updated 6 years ago
- FPGA and GPU acceleration of LeNet5☆34Updated 6 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆113Updated 4 years ago
- My name is Fang Biao. I'm currently pursuing my Master degree with the college of Computer Science and Engineering, Si Chuan University, …☆52Updated 2 years ago
- CNN Accelerator in Frequency Domain☆12Updated 5 years ago
- C++ code for HLS FPGA implementation of transformer☆17Updated 11 months ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆37Updated 6 years ago
- This repository provides an FPGA-based solution for executing object detection, focusing specifically on the popular YOLOv5 model archite…☆46Updated last year
- Vitis AI Lab: MNIST classifier☆18Updated 3 years ago