Alternatives and similar repositories for S2NN-HLS

Users that are interested in S2NN-HLS are comparing it to the libraries listed below

• jerry-D / HedgeHog-Fused-Spiking-Neural-Network-Emulator-Compute-Engine
  HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…
  ☆61Updated 9 months ago
• snagiri / CSE237D-PYNQ-SNN-Accelerator
  Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board
  ☆38Updated 6 years ago
• saunak1994 / CyNAPSEv11
  The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL
  ☆36Updated 6 years ago
• ChFrenkel / tinyODIN
  tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.
  ☆74Updated 2 years ago
• oshears / SNN-FPGA-Implementation
  ☆20Updated 4 years ago
• SFU-HiAccel / SyncNN
  [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.
  ☆63Updated 4 years ago
• Minz9 / SNN-on-FPGA
  SNN on FPGA
  ☆11Updated 3 years ago
• Angela-WangBo / Shenjing-RTL
  This is the RTL implementation of Shenjing, a low power neuromorphic computing accelerator
  ☆17Updated 5 years ago
• coreylammie / TCAS-STDP
  IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures
  ☆27Updated 6 years ago
• CestSansImportance / SNN-FPGA
  Spiking Neural Network RTL Implementation
  ☆63Updated 4 years ago
• OpenHEC / SNN-simulator-on-PYNQcluster
  ☆98Updated 5 years ago
• doitdodo / FPGA_Spiking_NN
  CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers
  ☆25Updated 5 years ago
• yucanliu / VLSI_SNN
  A Spiking Neuron Network Project in Verilog Implementation
  ☆25Updated 7 years ago
• ChFrenkel / ODIN
  ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.
  ☆213Updated 6 years ago
• jeshraghian / snn-accelerator
  ☆29Updated 3 years ago
• oshears / fpga_snn_models
  A repository FPGA-friendly SNN models
  ☆35Updated 4 years ago
• Marco-Winzker / Spiking_NN_RGB_FPGA
  FPGA Design of a Spiking Neural Network.
  ☆45Updated last year
• CodeNameGrapefruit / SoC_CNN
  Convolutional Neural Network Implemented in Verilog for System on Chip
  ☆28Updated 6 years ago
• ZhaoqxCN / PYNQ-CNN-ATTEMPT
  Some attempts to build CNN on PYNQ.
  ☆25Updated 6 years ago
• lirui-shanghaitech / A-convolution-kernel-implemented-by-Vivado-HLS
  This project implements a convolution kernel based on vivado HLS on zcu104
  ☆37Updated 5 years ago
• ralbertazzi / bnn
  Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools
  ☆52Updated 7 years ago
• romulus0914 / CNN_VGG19_verilog
  Convolution Neural Network of vgg19 model in verilog
  ☆49Updated 7 years ago
• cepdnaclk / e17-4yp-Neuromorphic-NoC-Architecture-for-SNNs
  This project aims to develop a novel neuromorphic NoC architecture based on RISC-V ISA to support spiking neural network applications, an…
  ☆21Updated 2 weeks ago
• markcxli / FPGA_DPU
  This project is to implement YOLO v3 on Xilinx FPGA with DPU
  ☆64Updated 5 years ago
• nikitabuzov / SpikingNeuralNet
  Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons
  ☆19Updated 5 years ago
• rafamedina97 / FPGA_SNN_STDP
  FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks
  ☆40Updated 5 years ago
• jiaaom / HPDLA
  Systolic-array based Deep Learning Accelerator generator
  ☆27Updated 5 years ago
• Deepak42074 / SRAM_IMC_MPW8
  The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…
  ☆16Updated 2 years ago
• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆48Updated 5 years ago
• arkhodamoradi / s2n2
  ☆17Updated 4 years ago