eejlny / S2NN-HLSLinks
Spiking neural network for Zynq devices with Vivado HLS
☆38Updated 7 years ago
Alternatives and similar repositories for S2NN-HLS
Users that are interested in S2NN-HLS are comparing it to the libraries listed below
Sorting:
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated 10 months ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆39Updated 6 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆36Updated 6 years ago
- ☆20Updated 4 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆64Updated 4 years ago
- This is the RTL implementation of Shenjing, a low power neuromorphic computing accelerator☆17Updated 5 years ago
- Spiking Neural Network RTL Implementation☆64Updated 4 years ago
- SNN on FPGA☆11Updated 3 years ago
- IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures☆29Updated 6 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆75Updated 2 years ago
- ☆30Updated 3 years ago
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆20Updated 5 years ago
- A Spiking Neuron Network Project in Verilog Implementation☆25Updated 7 years ago
- A repository FPGA-friendly SNN models☆35Updated 4 years ago
- Spiking Neural Network Accelerator☆15Updated 3 years ago
- Convolutional Neural Network Implemented in Verilog for System on Chip☆28Updated 6 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆25Updated 5 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- Framework for radix encoded SNN on FPGA☆18Updated 4 years ago
- A nest brain simulator based on FPGA(LIF NEURON)☆15Updated 4 years ago
- Convolution Neural Network of vgg19 model in verilog☆49Updated 8 years ago
- MIPS Processor, BNN Accelerator, AXI4 interface, Cache Controller and LRU replacement☆13Updated 3 years ago
- ☆100Updated 5 years ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆40Updated 5 years ago
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆16Updated 4 years ago
- This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code …☆24Updated 6 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆53Updated 7 years ago
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆14Updated 2 years ago
- ☆17Updated 4 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆16Updated 3 years ago