Alternatives and similar repositories for Xilinx_FPGA_HLS-Mapping-Neural-Network-to-Hardware

Users that are interested in Xilinx_FPGA_HLS-Mapping-Neural-Network-to-Hardware are comparing it to the libraries listed below

• canteen-man / CNN_FPGA_ZYNQ_PYNQ
  hls code zynq 7020 pynq z2 CNN
  ☆84Updated 6 years ago
• pp-Innovate / FPGA-ZynqNet
  FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS
  ☆112Updated 8 years ago
• mfarhadi / CNNIOT
  ☆46Updated 7 years ago
• onioncc / iSmartDNN
  Light-weighted neural network inference for object detection on small-scale FPGA board
  ☆90Updated 6 years ago
• hisrg / PYNQ_CNN_Accelerator_Tutorial
  中文：
  ☆101Updated 5 years ago
• ilaydayaman / CNN_for_SLR
  A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.
  ☆95Updated last year
• zhan6841 / FPGA-Accelerator-for-AES-LeNet-VGG16
  FPGA/AES/LeNet/VGG16
  ☆102Updated 6 years ago
• Anonymous788 / YOLO_BlockCir
  ☆33Updated 6 years ago
• sherylll / lenet5-accelerator
  FPGA and GPU acceleration of LeNet5
  ☆34Updated 5 years ago
• sazczmh / PYNQ_Workshop
  ☆38Updated 6 years ago
• a2824256 / HLS-LeNet
  The CNN based on the Xilinx Vivado HLS
  ☆36Updated 3 years ago
• patryk-oleniuk / cnn_hw_accelerator
  FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ
  ☆21Updated 6 years ago
• xupsh / 2019_SummerCamp
  2019 SEU-Xilinx Summer School
  ☆49Updated 5 years ago
• romulus0914 / CNN_VGG19_verilog
  Convolution Neural Network of vgg19 model in verilog
  ☆47Updated 7 years ago
• sazczmh / High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
  This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…
  ☆37Updated 5 years ago
• 666DZY666 / Design-and-Implementation-of-Face-Recognition-based-on-PYNQ
  Face recognition, computer vision, deep learning, PYNQ, Movidius NCS
  ☆59Updated 6 years ago
• ralbertazzi / bnn
  Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools
  ☆52Updated 7 years ago
• yuehniu / embeddedCNN
  Deploy CNN accelerator in embedded OS using SDSOC and Xilinx Ultrascale+ ZCU102 platform.
  ☆25Updated 6 years ago
• JinChen-tw / pynqz2_dpu140
  This TRD is implement DPU v1.4.0 on PYNQ-Z2 board
  ☆45Updated 4 years ago
• jiangwx / SkrSkr
  The second place winner for DAC-SDC 2020
  ☆97Updated 3 years ago
• GeneralZDS / FPGA-DCNN-Accelerator
  基于HLS的高效深度卷积神经网络FPGA实现方法
  ☆70Updated 6 years ago
• xupsh / Pynq-CV-OV5640
  Pynq computer vision examples with an OV5640 camera
  ☆48Updated 5 years ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆87Updated 4 years ago
• louisliuwei / PynqDocs
  PYNQ学习资料
  ☆163Updated 5 years ago
• HWAC-DL / hwac_object_tracker
  FPGA accelerated TinyYOLO v2 object detection neural network
  ☆72Updated 6 years ago
• heheda365 / ultra_net
  FPGA-based neural network inference project for 2020 DAC System Design Contest
  ☆113Updated 4 years ago
• g0kul / vcnn
  Verilog Convolutional Neural Network on PYNQ
  ☆28Updated 7 years ago
• papcjy / mnist_fpga
  using xilinx xc6slx45 to implement mnist net
  ☆83Updated 6 years ago
• mohdumar644 / TinyYOLO-BNN
  Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.
  ☆30Updated 6 years ago
• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆47Updated 5 years ago