DanielGerlinghoff / radix-encodingLinks
Framework for radix encoded SNN on FPGA
☆18Updated 4 years ago
Alternatives and similar repositories for radix-encoding
Users that are interested in radix-encoding are comparing it to the libraries listed below
Sorting:
- ☆20Updated 4 years ago
- SNN on FPGA☆11Updated 3 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆39Updated 6 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆36Updated 6 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆64Updated 4 years ago
- ☆17Updated 4 years ago
- A nest brain simulator based on FPGA(LIF NEURON)☆15Updated 4 years ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆92Updated 3 years ago
- Spiking Neural Network RTL Implementation☆64Updated 4 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆25Updated 5 years ago
- A repository FPGA-friendly SNN models☆35Updated 4 years ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆40Updated 5 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated 10 months ago
- ☆54Updated last year
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆75Updated 2 years ago
- [TCAD'24] This repository contains the source code for the paper "FireFly v2: Advancing Hardware Support for High-Performance Spiking Neu…☆23Updated last year
- FPGA Implementation of Image Processing for MNIST Dataset Based on Convolutional Neural Network Algorithm (CNN)☆11Updated 2 years ago
- SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…☆28Updated last year
- MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award☆16Updated last year
- Energy-efficient Event-driven Spiking Neural Network accelerator for FPGA with PyTorch integration☆100Updated last month
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Updated 2 years ago
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆14Updated 2 years ago
- FPGA Design of a Spiking Neural Network.☆46Updated last year
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆217Updated 6 years ago
- ReRAM implementation on CNN☆18Updated 7 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆16Updated 3 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆53Updated 4 years ago
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆20Updated 5 years ago
- I will share some useful or interesting papers about neuromorphic processor☆28Updated 11 months ago
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆16Updated 4 years ago