Marco-Winzker / NN_Pattern_FPGA
Neural Network for Pattern Recognition on an FPGA. Project for Education. Video lectures explain training of the network and FPGA implementation with VHDL.
☆22Updated 9 months ago
Alternatives and similar repositories for NN_Pattern_FPGA:
Users that are interested in NN_Pattern_FPGA are comparing it to the libraries listed below
- FPGA Design of a Neural Network for Color Detection☆75Updated 2 weeks ago
- A RTL-based project in Verilog that shows real-time video captured by a CMOS camera OV7670 and displayed on a monitor through VGA at 640 …☆12Updated last year
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆103Updated 4 years ago
- IP operations in verilog (simulation and implementation on ice40)☆55Updated 5 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆39Updated last year
- Systolic array based simple TPU for CNN on PYNQ-Z2☆23Updated 2 years ago
- Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps☆58Updated 3 years ago
- This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.☆50Updated 7 years ago
- Learn about image processing with an FPGA. Video lectures explain algorithm and implementation of lane detection for automotive driving. …☆33Updated 9 months ago
- Synthesizable RTL-Based video stream Convolutional Neural Network ( non HLS )☆56Updated 3 months ago
- FFT algorithm for fpga☆18Updated 3 years ago
- Integration on PL side of Zynq7000 for PYNQ framework of common industrial devices (GPIO, I2C, SPI and UART)☆32Updated 3 years ago
- A multi-board Extended Kalman Filter (EKF)☆31Updated 6 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆62Updated 4 years ago
- This project aims to design an 32-point FFT (Fast Fourier Transform) based DIT (decimation in time) Butterfly Algorithm with multiple clo…☆49Updated last year
- IEEE 754 single and double precision floating point library in systemverilog and vhdl☆62Updated 2 months ago
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆30Updated 4 years ago
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆13Updated last year
- Design for 4 x 4 Matrix Multiplication using Verilog☆29Updated 9 years ago
- RISC V core implementation using Verilog.☆26Updated 3 years ago
- This repository contains the Simple As Possible Floating Point Unit design based on the IEEE-754 Standard.☆18Updated last year
- This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.☆83Updated last year
- PYNQ Composabe Overlays☆70Updated 8 months ago
- 256-bit vector processor based on the RISC-V vector (V) extension☆28Updated 3 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆104Updated 6 years ago
- SDRAM controller with AXI4 interface☆87Updated 5 years ago
- 16-bit Adder Multiplier hardware on Digilent Basys 3☆66Updated last year
- Pynq projects and guides☆27Updated 6 years ago
- ☆27Updated 6 years ago
- FGPU is a soft GPU-like architecture for FPGAs. It is described in VHDL, fully customizable, and can be programmed using OpenCL.☆51Updated 2 months ago