cornell-zhang / bnn-fpgaView external linksLinks
Binarized Convolutional Neural Networks on Software-Programmable FPGAs (FPGA'17)
☆311Nov 16, 2020Updated 5 years ago
Alternatives and similar repositories for bnn-fpga
Users that are interested in bnn-fpga are comparing it to the libraries listed below
Sorting:
- Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"☆767May 26, 2017Updated 8 years ago
- ☆46Mar 21, 2020Updated 5 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆282Dec 5, 2019Updated 6 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆97Oct 2, 2021Updated 4 years ago
- An OpenCL-based FPGA Accelerator for Convolutional Neural Networks☆1,367Feb 14, 2022Updated 4 years ago
- Quantized Neural Networks (QNNs) on PYNQ☆703Jan 4, 2022Updated 4 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆336Jul 9, 2019Updated 6 years ago
- GUINNESS: A GUI-based binarized deep Neural NEtwork SyntheSizer toward an FPGA☆181Jul 20, 2019Updated 6 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)☆169Nov 7, 2023Updated 2 years ago
- Training Deep Neural Networks with Weights and Activations Constrained to +1 or -1☆1,064Nov 28, 2018Updated 7 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆187Jan 28, 2017Updated 9 years ago
- Python on Zynq FPGA for Convolutional Neural Networks☆624May 15, 2018Updated 7 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆92May 25, 2019Updated 6 years ago
- ☆119Dec 20, 2017Updated 8 years ago
- A Generic Distributed Auto-Tuning Infrastructure☆24Jul 29, 2021Updated 4 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆142Mar 30, 2018Updated 7 years ago
- This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning an…☆2,048Nov 8, 2025Updated 3 months ago
- Conditional channel- and precision-pruning on neural networks☆72Mar 4, 2020Updated 5 years ago
- HLS code for a BNN accelerator☆17Sep 13, 2018Updated 7 years ago
- ☆141Oct 24, 2018Updated 7 years ago
- ☆11Oct 28, 2021Updated 4 years ago
- Graph Learning at Scale: Characterizing and Optimizing Pre-Propagation GNNs (MLSys'25)☆17Apr 4, 2025Updated 10 months ago
- Graph-learning assisted instruction vulnerability estimation published in DATE 2020☆14Dec 6, 2020Updated 5 years ago
- ☆250Oct 13, 2020Updated 5 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆91Nov 25, 2018Updated 7 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆53May 29, 2018Updated 7 years ago
- CNN acceleration on virtex-7 FPGA with verilog HDL☆473Feb 27, 2018Updated 7 years ago
- QuickEst repository: Quick Estimation of Quality of Results☆26Oct 23, 2018Updated 7 years ago
- FPGA acceleration of arbitrary precision floating point computations.☆40May 17, 2022Updated 3 years ago
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆374Jan 20, 2025Updated last year
- FPGA Accelerator for CNN using Vivado HLS☆331Oct 25, 2021Updated 4 years ago
- DNN quantization with outlier channel splitting (ICML'19)☆113Mar 21, 2020Updated 5 years ago
- DATuner Repository☆17Sep 9, 2018Updated 7 years ago
- A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard☆890Jul 29, 2024Updated last year
- Dataflow compiler for QNN inference on FPGAs☆938Updated this week
- collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning☆567Feb 3, 2024Updated 2 years ago
- GARNET: Reduced-Rank Topology Learning for Robust and Scalable Graph Neural Networks☆36Oct 1, 2023Updated 2 years ago
- Xilinx Deep Learning IP☆94May 10, 2021Updated 4 years ago
- Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel☆222Jan 23, 2020Updated 6 years ago