atrifex / CNN-Acceleration
Implementing CNN code in CUDA and OpenCL to evaluate its performance on NVIDIA GPUs, AMD GPUs, and an FPGA platform.
☆53Updated 7 years ago
Related projects ⓘ
Alternatives and complementary repositories for CNN-Acceleration
- Winograd-based convolution implementation in OpenCL☆28Updated 7 years ago
- OpenCL Labs for PAPAA Summer School 2016 Edition☆46Updated 7 years ago
- PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs☆31Updated 5 years ago
- Aiming at an AI Chip based on RISC-V and NVDLA.☆21Updated 6 years ago
- Course Webpage for CS 217 Hardware Accelerators for Machine Learning, Stanford University☆98Updated last year
- ☆53Updated 5 years ago
- Simulator for BitFusion☆92Updated 4 years ago
- Approximate layers - TensorFlow extension☆26Updated 6 months ago
- Eyeriss chip simulator☆33Updated 4 years ago
- ☆13Updated 4 years ago
- This is a collection of works on neural networks and neural accelerators.☆40Updated 5 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆91Updated 5 years ago
- ☆39Updated 7 years ago
- Explore the energy-efficient dataflow scheduling for neural networks.☆216Updated 4 years ago
- ☆30Updated last year
- ☆26Updated 7 years ago
- My name is Fang Biao. I'm currently pursuing my Master degree with the college of Computer Science and Engineering, Si Chuan University, …☆41Updated last year
- ☆69Updated 4 years ago
- pytorch fixed point training tool/framework☆34Updated 4 years ago
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆131Updated 4 years ago
- ☆36Updated 5 years ago
- Tool for optimize CNN blocking☆93Updated 4 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆88Updated 5 years ago
- implementation of winograd minimal convolution algorithm on Intel Architecture☆39Updated 6 years ago
- ☆42Updated 5 years ago
- ☆35Updated 5 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆59Updated 3 years ago
- Efficient Sparse-Winograd Convolutional Neural Networks (ICLR 2018)☆190Updated 5 years ago
- ☆119Updated 6 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆161Updated 2 years ago