Implementing CNN code in CUDA and OpenCL to evaluate its performance on NVIDIA GPUs, AMD GPUs, and an FPGA platform.
☆56Apr 25, 2017Updated 9 years ago
Alternatives and similar repositories for CNN-Acceleration
Users that are interested in CNN-Acceleration are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- I'm going to use the Winograd’s minimal filtering algorithms to introduce a new class of fast algorithms for convolutional neural networks…☆12Mar 22, 2018Updated 8 years ago
- Escoin: Efficient Sparse Convolutional Neural Network Inference on GPUs☆16Feb 28, 2019Updated 7 years ago
- ☆35Dec 2, 2016Updated 9 years ago
- A project on hardware design for convolutional neural network. This neural network is of 2 layers with 400 inputs in the first layer. Thi…☆18Mar 5, 2018Updated 8 years ago
- This repo has codes for hardware accelerator design for CNNs using high level synthesis from Altera.☆13Dec 18, 2017Updated 8 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆187Jan 28, 2017Updated 9 years ago
- Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.☆21Feb 28, 2021Updated 5 years ago
- This repo is for ECE44x (Fall2015-Spring2016)☆21Feb 12, 2018Updated 8 years ago
- OpenCL Labs for PAPAA Summer School 2016 Edition☆46Jul 24, 2017Updated 8 years ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆186Jun 20, 2024Updated last year
- verilog CNN generator for FPGA☆34Jan 4, 2021Updated 5 years ago
- A parametric RTL code generator of an efficient integer MxM Systolic Array implementation for Xilinx FPGAs.☆36Aug 28, 2025Updated 8 months ago
- Platform + GUI for hyperparameter optimization of recurrent neural networks (MATLAB).☆10Dec 29, 2021Updated 4 years ago
- ☆11Sep 3, 2022Updated 3 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- ☆16Feb 19, 2026Updated 2 months ago
- DMA controller for CNN accelerator☆14May 22, 2017Updated 8 years ago
- Sources for OpenCL and CUDA tutorials. http://jlaning.com☆20Jan 9, 2016Updated 10 years ago
- This is a c++ implementation of an LSTM Neural Network parallelized for a GPU using CUDA☆25Oct 29, 2017Updated 8 years ago
- A FIFO or Queue is an array of memory commonly used in hardware to transfer transfer data between two circuits with different clocks. The…☆16Nov 5, 2017Updated 8 years ago
- Fun project to run your own LLM chat bot using llama.cpp☆11Jun 9, 2023Updated 2 years ago
- This linter plugin for SublimeLinter provides an interface to iverilog (verilog compiler).☆13Apr 16, 2024Updated 2 years ago
- A simple script to plot the Roofline model for given HW platforms and applications☆10Mar 17, 2026Updated last month
- Docker&vLLM官方镜像部署DeepSeek模型，在生产环境中提供类OpenAI接口服务。☆14Jul 17, 2025Updated 9 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- An OpenCL-Based FPGA Accelerator for Compressed YOLOv2☆39May 27, 2021Updated 4 years ago
- first-order deep learning accelerator model☆22Nov 27, 2017Updated 8 years ago
- ☆14Apr 8, 2025Updated last year
- SDAccel Examples☆362May 20, 2022Updated 3 years ago
- Record GPU memory accesses of a CUDA program and visualize the access pattern in a browser☆13Nov 17, 2020Updated 5 years ago
- PyTorch implementation for "Training and Inference on Any-Order Autoregressive Models the Right Way", NeurIPS 2022 Oral, TPM 2023 Best Pa…☆16May 31, 2023Updated 2 years ago
- 📓 A LaTeX template for writing thesis report for RUET☆12Jan 7, 2016Updated 10 years ago
- A Vector Caching Scheme for Streaming FPGA SpMV Accelerators☆10Sep 7, 2015Updated 10 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆93May 25, 2019Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- This place provide different SRAM cells netlist to be simulated with HSpice tool in sub-20nm FinFET technologies.☆12Dec 31, 2020Updated 5 years ago
- Network on chip based neural network accelerator☆11Mar 25, 2021Updated 5 years ago
- ☆13May 8, 2020Updated 5 years ago
- Ultra96 PYNQ入门之一次简单的总结☆14May 21, 2020Updated 5 years ago
- Verilog Code and Logisim simulation of a Weighted Round Robit Arbiter circuit using digital components☆20Mar 10, 2018Updated 8 years ago
- ☆84Jul 16, 2020Updated 5 years ago
- This is the final project for the BP NN FPGA implementation☆11Jan 14, 2017Updated 9 years ago