Alternatives and similar repositories for rodinia-hls:

Users that are interested in rodinia-hls are comparing it to the libraries listed below

• CMU-SAFARI / VAMPIRE
  An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …
  ☆38Updated 5 years ago
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆52Updated 5 years ago
• zslwyuan / PAAS_V1.0
  PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems
  ☆43Updated 3 years ago
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆48Updated 7 years ago
• Xilinx / merlin-compiler
  ☆57Updated last year
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆117Updated 4 years ago
• CMU-SAFARI / PiDRAM
  PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …
  ☆60Updated last year
• esl-epfl / gem5-X
  The gem5-X open source framework (based on the gem5 simulator)
  ☆38Updated last year
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆60Updated 7 months ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆84Updated 4 months ago
• TeCSAR-UNCC / gem5-SALAM
  ☆89Updated last year
• fpgasystems / GPU-FPGA-Recommendation-System
  FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters
  ☆16Updated 3 years ago
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 3 years ago
• UCLA-VAST / hbmbench
  ☆23Updated 4 years ago
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆66Updated 5 years ago
• Xilinx / xup_aie_training
  Hands-on experience programming AI Engines using Vitis Unified Software Platform
  ☆38Updated 6 months ago
• tukl-msd / DRAMSpec
  A High-Level DRAM Timing, Power and Area Exploration Tool
  ☆27Updated 4 years ago
• jianyicheng / DSS
  DASS HLS Compiler
  ☆28Updated last year
• lana555 / dynamatic
  ☆86Updated 11 months ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆30Updated 3 years ago
• sfu-arch / SpGEMM
  ☆34Updated 3 years ago
• PrincetonUniversity / MosaicSim
  Heterogeneous simulator for DECADES Project
  ☆31Updated 8 months ago
• tancheng / VectorCGRA
  CGRA framework with vectorization support.
  ☆24Updated this week
• amin-norollah / PAT-Noxim
  cycle accurate Network-on-Chip Simulator
  ☆25Updated last year
• template-hls / template-hls-float
  ☆27Updated 5 years ago
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆99Updated last year
• fpga-opencl-benchmarks / rodinia_fpga
  Rodinia Benchmark Suite for OpenCL-based FPGAs
  ☆30Updated last year
• KastnerRG / Spector-HLS
  Contains FPGA benchmarks for Vivado HLS and Catapult HLS
  ☆26Updated 4 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 2 years ago
• seldridge / rocket-rocc-examples
  Tests for example Rocket Custom Coprocessors
  ☆69Updated 4 years ago