Alternatives and similar repositories for rodinia-hls

Users that are interested in rodinia-hls are comparing it to the libraries listed below

• lana555 / dynamatic
  ☆86Updated last year
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆52Updated 5 years ago
• jianyicheng / DSS
  DASS HLS Compiler
  ☆29Updated last year
• KastnerRG / Spector-HLS
  Contains FPGA benchmarks for Vivado HLS and Catapult HLS
  ☆26Updated 4 years ago
• zslwyuan / PAAS_V1.0
  PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems
  ☆43Updated 3 years ago
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 4 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆90Updated 7 months ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 3 years ago
• sfu-arch / SpGEMM
  ☆35Updated 4 years ago
• Xilinx / xup_aie_training
  Hands-on experience programming AI Engines using Vitis Unified Software Platform
  ☆40Updated 9 months ago
• GramThanos / CPU-on-Vivado-HLS
  A simple MIPS-like CPU demo in C++ for Xilinx Vivado HLS
  ☆18Updated 5 years ago
• CMU-SAFARI / VAMPIRE
  An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …
  ☆38Updated 6 years ago
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆50Updated 7 years ago
• UCLA-VAST / hbmbench
  ☆23Updated 4 years ago
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆121Updated 5 years ago
• TeCSAR-UNCC / gem5-SALAM
  ☆91Updated last year
• template-hls / template-hls-float
  ☆29Updated 6 years ago
• jmjos / ratatoskr
  Ratatoskr NoC Simulator
  ☆25Updated 4 years ago
• CMU-SAFARI / PiDRAM
  PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …
  ☆66Updated last year
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆46Updated 2 months ago
• MPSLab-ASU / DiRAC
  Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators
  ☆28Updated last year
• Xilinx / merlin-compiler
  ☆57Updated last year
• suchandler96 / gem5-NVDLA
  ☆30Updated last month
• CGCL-codes / ScalaBFS
  A Scalable BFS Accelerator on FPGA-HBM Platform
  ☆14Updated last year
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆71Updated 6 years ago
• esl-epfl / gem5-X
  The gem5-X open source framework (based on the gem5 simulator)
  ☆41Updated last year
• andrewboutros / rad-flow
  The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…
  ☆34Updated last month
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆30Updated 3 years ago
• fpgasystems / GPU-FPGA-Recommendation-System
  FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters
  ☆16Updated 3 years ago
• icgrp / hipr
  ☆15Updated 2 years ago