UCLA-SEAL / HeteroGen
HeteroGen: transpiling C to heterogeneous HLS code with automated test generation and program repair (ASPLOS 2022)
☆17Updated 5 months ago
Alternatives and similar repositories for HeteroGen:
Users that are interested in HeteroGen are comparing it to the libraries listed below
- Heterogeneous simulator for DECADES Project☆32Updated 9 months ago
- ordspecsim: The Swarm architecture simulator☆24Updated 2 years ago
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆48Updated 2 years ago
- STONNE Simulator integrated into SST Simulator☆17Updated 11 months ago
- ☆57Updated last year
- ☆24Updated last year
- EQueue Dialect☆40Updated 3 years ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆28Updated last year
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆58Updated 5 months ago
- ☆23Updated 4 years ago
- HLS project modeling various sparse accelerators.☆12Updated 3 years ago
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- DASS HLS Compiler☆29Updated last year
- CGRA framework with vectorization support.☆27Updated this week
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆30Updated 3 years ago
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 3 years ago
- ☆11Updated last year
- ☆9Updated 2 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 2 years ago
- ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis☆31Updated last year
- ☆25Updated 3 years ago
- A Full-System Framework for Simulating NDP devices from Caches to DRAM☆16Updated last year
- ☆26Updated 7 years ago
- A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.☆18Updated 2 years ago
- Polyhedral High-Level Synthesis in MLIR☆30Updated last year
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆62Updated 8 months ago
- ☆28Updated 5 months ago
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆48Updated last year
- A fast, accurate trace-based simulator for High-Level Synthesis.☆45Updated last month
- The gem5-X open source framework (based on the gem5 simulator)☆38Updated last year