Alternatives and similar repositories for HeteroGen

Users that are interested in HeteroGen are comparing it to the libraries listed below

• PrincetonUniversity / MosaicSim
  Heterogeneous simulator for DECADES Project
  ☆32Updated last year
• SwarmArch / sim
  ordspecsim: The Swarm architecture simulator
  ☆25Updated 2 years ago
• jianyicheng / DSS
  DASS HLS Compiler
  ☆29Updated last year
• cdsc-github / parade-ara-simulator
  PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration
  ☆48Updated 3 years ago
• Xilinx / merlin-compiler
  ☆58Updated 2 years ago
• kumasento / polsca
  Polyhedral High-Level Synthesis in MLIR
  ☆33Updated 2 years ago
• wincle626 / HLS_Legup
  ☆28Updated 7 years ago
• MPSLab-ASU / DiRAC
  Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators
  ☆29Updated 2 years ago
• cucapra / EventQueue
  EQueue Dialect
  ☆40Updated 3 years ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 2 years ago
• UCLA-VAST / GNN-DSE
  DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"
  ☆40Updated last year
• stonne-simulator / sst-elements-with-stonne
  STONNE Simulator integrated into SST Simulator
  ☆20Updated last year
• PolyArch / gem-forge-framework
  ☆25Updated last year
• scalesim-project / krittika
  Heterogenous ML accelerator
  ☆19Updated 3 months ago
• UCLA-VAST / hbmbench
  ☆24Updated 4 years ago
• UCLA-VAST / splag
  Accelerating SSSP for power-law graphs using an FPGA.
  ☆23Updated 3 years ago
• icgrp / hipr
  ☆16Updated 2 years ago
• Junyi-Liu / benchmarks-HLS
  Benchmarks, testbenches, and transformed codes for high-level synthesis research
  ☆13Updated 8 years ago
• darchr / gem5art
  Artifact, reproducibility, and testing utilites for gem5
  ☆23Updated 4 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆47Updated 3 years ago
• CMU-SAFARI / Load-Inspector
  A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…
  ☆21Updated last year
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆31Updated 3 years ago
• gthparch / HBM
  High Bandwidth Memory (HBM) timing model based on DRAMSim2
  ☆42Updated 8 years ago
• zslwyuan / PAAS_V1.0
  PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems
  ☆43Updated 3 years ago
• pku-liang / Cement
  The Next-gen Language & Compiler Powering Efficient Hardware Design
  ☆29Updated 7 months ago
• CastLab-KAIST / OpenMDS
  ☆14Updated 2 years ago
• dovedevic / blimp
  A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.
  ☆18Updated 3 years ago
• circt-hls / circt-hls
  CIRCT-based HLS compilation flows, debugging, and cosimulation tools.
  ☆50Updated 2 years ago
• baichen318 / arch-explorer
  ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis
  ☆34Updated last year
• sfu-arch / muir
  ☆24Updated 4 years ago