☆29Oct 4, 2017Updated 8 years ago
Alternatives and similar repositories for HLS_Legup
Users that are interested in HLS_Legup are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- HeteroGen: transpiling C to heterogeneous HLS code with automated test generation and program repair (ASPLOS 2022)☆16Sep 25, 2024Updated last year
- HLS project modeling various sparse accelerators.☆12Jan 11, 2022Updated 4 years ago
- Polyhedral High-Level Synthesis in MLIR☆35Mar 17, 2023Updated 3 years ago
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆40Oct 3, 2023Updated 2 years ago
- Fuzz testing for Dafny☆13Jul 7, 2022Updated 3 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- ☆61Aug 4, 2023Updated 2 years ago
- The Shang high-level synthesis framework☆120May 29, 2014Updated 11 years ago
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆62Mar 17, 2022Updated 4 years ago
- [FPGA 2020] Open sourced implementation for the ACM/SIGDA FPGA '20 paper titled "GraphACT: Accelerating GCN Training on CPU-FPGA Heteroge…☆19Mar 6, 2021Updated 5 years ago
- PandA-bambu public repository☆314Feb 10, 2026Updated last month
- An open source high level synthesis (HLS) tool built on top of LLVM☆127Jun 11, 2024Updated last year
- Python version of tools to work with AIG formatted files☆12May 20, 2025Updated 10 months ago
- A formally verified high-level synthesis tool based on CompCert and written in Coq.☆98Jan 29, 2026Updated last month
- Benchmarks, testbenches, and transformed codes for high-level synthesis research☆13Aug 18, 2017Updated 8 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆50Mar 18, 2026Updated last week
- ☆11Oct 2, 2023Updated 2 years ago
- High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing☆54Jun 6, 2024Updated last year
- FPGA 2025 SAT Accel: A modern SAT Solver on FPGA Repository☆14Mar 13, 2025Updated last year
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆54Jul 17, 2023Updated 2 years ago
- ☆13Mar 6, 2023Updated 3 years ago
- Includes the SVD-based approximation algorithms for compressing deep learning models and the FPGA accelerators exploiting such approximat…☆16Mar 3, 2023Updated 3 years ago
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Aug 5, 2022Updated 3 years ago
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Aug 22, 2021Updated 4 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Benchmarks for Accelerator Design and Customized Architectures☆136Apr 1, 2020Updated 5 years ago
- RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance☆12May 3, 2024Updated last year
- ☆12Jul 20, 2022Updated 3 years ago
- Benchmarks for High-Level Synthesis☆10Mar 17, 2023Updated 3 years ago
- A group of students who are interested in Compilers, and they want to improve themselves together.☆25Aug 23, 2022Updated 3 years ago
- ☆13Jun 20, 2023Updated 2 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆55Feb 6, 2020Updated 6 years ago
- SystemC simulator of a highly customizable Nostrum network-on-chip (NoC).☆14Apr 20, 2014Updated 11 years ago
- ☆25May 9, 2019Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- An HBM FPGA based SpMV Accelerator☆17Aug 29, 2024Updated last year
- Convolutional Neural Network Implemented in Verilog for System on Chip☆28Apr 18, 2019Updated 6 years ago
- DATE'24 paper: "Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs"☆20Dec 10, 2024Updated last year
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Jan 3, 2023Updated 3 years ago
- DASS HLS Compiler☆30Oct 4, 2023Updated 2 years ago
- ICCAD'23 Best Paper Award candidate: Robust GNN-based Representation Learning for HLS☆24May 23, 2024Updated last year
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.☆185Mar 8, 2026Updated 2 weeks ago