Alternatives and similar repositories for riffa

Users that are interested in riffa are comparing it to the libraries listed below

• alexforencich / verilog-pcie
  Verilog PCI express components
  ☆1,446Updated last year
• alexforencich / verilog-axis
  Verilog AXI stream components for FPGA implementation
  ☆834Updated 7 months ago
• alexforencich / verilog-axi
  Verilog AXI components for FPGA implementation
  ☆1,831Updated 7 months ago
• ultraembedded / cores
  Various HDL (Verilog) IP Cores
  ☆840Updated 4 years ago
• alexforencich / verilog-i2c
  Verilog I2C interface for FPGA implementation
  ☆650Updated 7 months ago
• Digilent / vivado-library
  ☆642Updated 3 months ago
• WangXuan95 / Xilinx-FPGA-PCIe-XDMA-Tutorial
  Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
  ☆704Updated 2 years ago
• alexforencich / verilog-uart
  Verilog UART
  ☆506Updated 7 months ago
• pulp-platform / axi
  AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
  ☆1,389Updated last week
• bperez77 / xilinx_axidma
  A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communicat…
  ☆517Updated 2 years ago
• fpganinja / taxi
  AXI, AXI stream, Ethernet, and PCIe components in System Verilog
  ☆428Updated last week
• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆595Updated 6 months ago
• aolofsson / oh
  Verilog library for ASIC and FPGA designers
  ☆1,341Updated last year
• ultraembedded / core_ddr3_controller
  A DDR3 memory controller in Verilog for various FPGAs
  ☆525Updated 4 years ago
• analogdevicesinc / hdl
  HDL libraries and projects
  ☆1,764Updated last week
• pConst / basic_verilog
  Must-have verilog systemverilog modules
  ☆1,859Updated 2 months ago
• fpgadeveloper / fpga-drive-aximm-pcie
  Example designs for FPGA Drive FMC
  ☆268Updated 9 months ago
• seldridge / verilog
  Repository for basic (and not so basic) Verilog blocks with high re-use potential
  ☆596Updated 7 years ago
• Xilinx / dma_ip_drivers
  Xilinx QDMA IP Drivers
  ☆732Updated 2 months ago
• dpretet / async_fifo
  A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
  ☆387Updated last month
• enjoy-digital / litepcie
  Small footprint and configurable PCIe core
  ☆593Updated last week
• eugene-tarassov / vivado-risc-v
  Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
  ☆997Updated 2 months ago
• ucb-bar / fpga-zynq
  Support for Rocket Chip on Zynq FPGAs
  ☆411Updated 6 years ago
• fpgasystems / fpga-network-stack
  Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)
  ☆862Updated 3 months ago
• dawsonjon / fpu
  synthesiseable ieee 754 floating point library in verilog
  ☆679Updated 2 years ago
• alexforencich / verilog-ethernet
  Verilog Ethernet components for FPGA implementation
  ☆2,729Updated 7 months ago
• openhwgroup / cv32e40p
  CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
  ☆1,130Updated 5 months ago
• stffrdhrn / sdram-controller
  Verilog SDRAM memory controller
  ☆349Updated 8 years ago
• suisuisi / FPGA_Library
  Vivado诸多IP，包括图像处理等
  ☆232Updated last year
• ucsdsysnet / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆201Updated last year