Xilinx / SDAccel_ExamplesLinks
SDAccel Examples
☆358Updated 3 years ago
Alternatives and similar repositories for SDAccel_Examples
Users that are interested in SDAccel_Examples are comparing it to the libraries listed below
Sorting:
- SDAccel Development Environment Tutorials☆109Updated 5 years ago
- Getting Started with Xilinx ML Suite☆339Updated 4 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆335Updated 6 years ago
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆332Updated 10 months ago
- Vitis_Accel_Examples☆576Updated this week
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆144Updated 8 years ago
- Documentation for NVDLA.☆260Updated 4 months ago
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs (FPGA'17)☆311Updated 5 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆226Updated 6 years ago
- Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs☆104Updated 10 months ago
- ☆83Updated 5 years ago
- Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel☆219Updated 5 years ago
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆372Updated 10 months ago
- Run Time for AIE and FPGA based platforms☆637Updated last week
- Build Customized FPGA Implementations for Vivado☆347Updated last week
- SystemC/C++ library of commonly-used hardware functions and components for HLS.☆287Updated last month
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆156Updated 5 years ago
- VNx: Vitis Network Examples☆155Updated 3 months ago
- ☆117Updated 4 years ago
- Support for Rocket Chip on Zynq FPGAs☆413Updated 6 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆281Updated 6 years ago
- Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".☆204Updated 4 years ago
- 100 Gbps TCP/IP stack for Vitis shells☆226Updated last year
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆164Updated 3 years ago
- Recipe for FPGA cooking☆307Updated last year
- CAPI SNAP Framework Hardware and Software☆110Updated 4 years ago
- Virtual Platform for NVDLA☆159Updated 7 years ago
- A pre-RTL, power-performance model for fixed-function accelerators☆182Updated last year
- Quantized Neural Networks (QNNs) on PYNQ☆700Updated 3 years ago
- Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA), with self-driving accelerated☆234Updated 10 months ago