Alternatives and similar repositories for xup_vitis_network_example

Users that are interested in xup_vitis_network_example are comparing it to the libraries listed below

• Xilinx / open-nic-shell
  AMD OpenNIC Shell includes the HDL source files
  ☆127Updated 9 months ago
• fpgasystems / Vitis_with_100Gbps_TCP-IP
  100 Gbps TCP/IP stack for Vitis shells
  ☆218Updated last year
• fpgasystems / Coyote
  Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous pl…
  ☆295Updated this week
• hpcn-uam / 100G-fpga-network-stack-core
  This repo contains the Limago code
  ☆87Updated 5 months ago
• Xilinx / Get_Moving_With_Alveo
  For publishing the source for UG1352 "Get Moving with Alveo"
  ☆50Updated 5 years ago
• Xilinx / open-nic
  AMD OpenNIC Project Overview
  ☆285Updated 2 years ago
• hpcn-uam / Limago
  Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
  ☆132Updated 4 years ago
• Xilinx / RecoNIC
  RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.
  ☆148Updated 7 months ago
• Xilinx / open-nic-driver
  AMD OpenNIC driver includes the Linux kernel driver
  ☆69Updated 9 months ago
• Xilinx / pcie_qdma_ats_example
  ☆26Updated 4 years ago
• fpgasystems / davos
  Distributed Accelerator OS
  ☆63Updated 3 years ago
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆330Updated 9 months ago
• Xilinx / SDAccel-Tutorials
  SDAccel Development Environment Tutorials
  ☆111Updated 5 years ago
• ucsdsysnet / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆200Updated last year
• ucsdsysnet / Rosebud
  Framework for FPGA-accelerated Middlebox Development
  ☆46Updated 2 years ago
• Xilinx / AlveoLink
  This repository contains IPs, Vitis kernels and software APIs that can be leveraged by Vitis users to build scale-out solutions on multip…
  ☆22Updated 2 years ago
• RC4ML / Shuhai
  Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…
  ☆117Updated 4 months ago
• OPAE / intel-fpga-bbb
  Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs
  ☆103Updated 8 months ago
• Xilinx / HLS_packet_processing
  ☆48Updated 5 years ago
• NetFPGA / NetFPGA-PLUS
  ☆53Updated last year
• spcl / pspin
  PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing
  ☆104Updated 2 years ago
• OpenCAPI / oc-accel
  OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology
  ☆72Updated last year
• Xilinx / ACCL
  Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
  ☆97Updated 3 months ago
• alexforencich / verilog-cam
  Verilog Content Addressable Memory Module
  ☆114Updated 3 years ago
• anan-cn / Open-Source-Network-on-Chip-Router-RTL
  ☆78Updated 10 years ago
• RC4ML / FpgaNIC
  FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs [ATC 22]
  ☆132Updated 2 years ago
• lastweek / fpga_readings
  Recipe for FPGA cooking
  ☆307Updated last year
• tuna / tapa
  TAPA compiles task-parallel HLS program into high-performance FPGA accelerators.
  ☆175Updated 2 months ago
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs
  ☆167Updated last year
• mcjtag / tcam
  TCAM (Ternary Content-Addressable Memory) in Verilog
  ☆53Updated 2 years ago