Alternatives and similar repositories for dma_ip_drivers:

Users that are interested in dma_ip_drivers are comparing it to the libraries listed below

• fpgasystems / fpga-network-stack
  Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)
  ☆796Updated this week
• bperez77 / xilinx_axidma
  A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communicat…
  ☆487Updated 2 years ago
• KastnerRG / riffa
  The RIFFA development repository
  ☆804Updated 9 months ago
• WangXuan95 / Xilinx-FPGA-PCIe-XDMA-Tutorial
  Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
  ☆539Updated last year
• alexforencich / verilog-pcie
  Verilog PCI express components
  ☆1,236Updated 10 months ago
• fpgadeveloper / fpga-drive-aximm-pcie
  Example designs for FPGA Drive FMC
  ☆237Updated 2 months ago
• ucsdsysnet / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆189Updated 10 months ago
• alexforencich / verilog-axis
  Verilog AXI stream components for FPGA implementation
  ☆789Updated 2 weeks ago
• Xilinx / device-tree-xlnx
  Linux device tree generator for the Xilinx SDK (Vivado > 2014.1)
  ☆209Updated 3 months ago
• Xilinx / XRT
  Run Time for AIE and FPGA based platforms
  ☆579Updated this week
• alexforencich / verilog-axi
  Verilog AXI components for FPGA implementation
  ☆1,633Updated 2 weeks ago
• corundum / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆1,829Updated 8 months ago
• Xilinx / Vitis-HLS-Introductory-Examples
  ☆651Updated 3 months ago
• ljgibbslf / Chinese-Translation-of-PCI-Express-Technology-
  Chinese Translation on <PCI Express Technology Comprehensive Guide to Generations 1.x, 2.x and 3.0> by Mindshare Mindshare
  ☆287Updated last year
• pulp-platform / axi
  AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
  ☆1,234Updated 2 weeks ago
• fpgasystems / Vitis_with_100Gbps_TCP-IP
  100 Gbps TCP/IP stack for Vitis shells
  ☆201Updated 10 months ago
• Xilinx / open-nic
  AMD OpenNIC Project Overview
  ☆247Updated 2 years ago
• Xilinx / Vitis_Accel_Examples
  Vitis_Accel_Examples
  ☆531Updated 3 weeks ago
• Digilent / vivado-library
  ☆605Updated 8 months ago
• alexforencich / verilog-i2c
  Verilog I2C interface for FPGA implementation
  ☆584Updated 2 weeks ago
• Xilinx / XilinxBoardStore
  ☆278Updated last month
• enjoy-digital / litepcie
  Small footprint and configurable PCIe core
  ☆521Updated this week
• alexforencich / verilog-uart
  Verilog UART
  ☆455Updated 2 weeks ago
• alexforencich / verilog-ethernet
  Verilog Ethernet components for FPGA implementation
  ☆2,470Updated 2 weeks ago
• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆523Updated last month
• ultraembedded / cores
  Various HDL (Verilog) IP Cores
  ☆748Updated 3 years ago
• Xilinx / embeddedsw
  Xilinx Embedded Software (embeddedsw) Development
  ☆997Updated 3 months ago
• Xilinx / u-boot-xlnx
  The official Xilinx u-boot repository
  ☆615Updated last week
• Xilinx / Vitis-Tutorials
  Vitis In-Depth Tutorials
  ☆1,336Updated last week
• eugene-tarassov / vivado-risc-v
  Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
  ☆915Updated last week