mgwoo / RePlAceLinks
☆10Updated 3 years ago
Alternatives and similar repositories for RePlAce
Users that are interested in RePlAce are comparing it to the libraries listed below
Sorting:
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆31Updated 3 years ago
- ☆50Updated 2 years ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆157Updated 3 weeks ago
- Rsyn – An Extensible Physical Synthesis Framework☆137Updated last year
- CUGR, VLSI Global Routing Tool Developed by CUHK☆142Updated 2 years ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆109Updated last year
- ☆36Updated 5 years ago
- RePlAce global placement tool☆246Updated 5 years ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆90Updated last year
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆54Updated last year
- GPU-based logic synthesis tool☆97Updated 2 months ago
- BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…☆21Updated 7 years ago
- VLSI EDA Global Router☆80Updated 8 years ago
- Collection of digital hardware modules & projects (benchmarks)☆80Updated 2 months ago
- Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes☆76Updated 3 weeks ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆61Updated last year
- Open Source Detailed Placement engine☆40Updated 6 years ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆142Updated 2 years ago
- Artificial Netlist Generator☆46Updated last year
- ☆61Updated 4 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆190Updated 8 months ago
- ☆27Updated last year
- ☆31Updated 2 years ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆60Updated 5 years ago
- ☆20Updated last year
- Timing prediction dataset download and instructions.☆17Updated 2 years ago
- The first version of TritonPart☆31Updated 2 years ago
- A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…☆39Updated last month
- A logic synthesis tool☆84Updated 5 months ago
- the awesome work, project and lab of EDA (Electronic Design Automation). continue update...☆26Updated last year