Alternatives and similar repositories for TritonCTS

Users that are interested in TritonCTS are comparing it to the libraries listed below

• aolofsson / POSH
  ☆44Updated 6 years ago
• The-OpenROAD-Project-Attic / OpenROAD-Utilities
  Open-sourced utilities for initial flow setup, calibration, and other user functions for OpenROAD project
  ☆19Updated 6 years ago
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆40Updated 6 years ago
• aolofsson / IDEA
  ☆33Updated 6 years ago
• The-OpenROAD-Project / alpha-release
  Builds, flow and designs for the alpha release
  ☆54Updated 6 years ago
• woset-workshop / woset-workshop.github.io
  Workshop on Open-Source EDA Technology (WOSET)
  ☆48Updated last year
• vsdip / vsdStdCellCharacterizer_sky130
  ☆20Updated 4 years ago
• bespoke-silicon-group / bsg_fakeram
  fakeram generator for use by researchers who do not have access to commercial ram generators
  ☆37Updated 3 years ago
• asyncvlsi / AMC
  AMC: Asynchronous Memory Compiler
  ☆52Updated 5 years ago
• The-OpenROAD-Project / TritonSizer
  UCSD Sizer for leakage/dynamic power recovery, timing recovery
  ☆18Updated 6 years ago
• jinwookjungs / datc_robust_design_flow
  DATC Robust Design Flow.
  ☆36Updated 6 years ago
• jinwookjungs / lefdef_util
  A LEF/DEF Utility.
  ☆33Updated 6 years ago
• The-OpenROAD-Project / TritonMacroPlace
  Macro placement tool for OpenROAD flow
  ☆24Updated 5 years ago
• chipsalliance / f4pga-sdf-timing
  Python library for working Standard Delay Format (SDF) Timing Annotation files.
  ☆30Updated last year
• cuhk-eda / ripple-fpga
  RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA
  ☆91Updated 5 years ago
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆55Updated 3 years ago
• RIOSLaboratory / OpenRPDK28
  Open source process design kit for 28nm open process
  ☆72Updated last year
• StanfordVLSI / dragonphy2
  Open Source PHY v2
  ☆33Updated last year
• scale-lab / OpenPhySyn
  EDA physical synthesis optimization kit
  ☆64Updated 2 years ago
• USCPOSH / AMPSE
  This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…
  ☆25Updated 2 years ago
• bespoke-silicon-group / bsg_sv2v
  A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.
  ☆44Updated 2 years ago
• rahulk29 / sram22
  A configurable SRAM generator
  ☆57Updated 5 months ago
• The-OpenROAD-Project / OpenDP
  Open Source Detailed Placement engine
  ☆12Updated 5 years ago
• sanggido / OpenDP
  Open Source Detailed Placement engine
  ☆40Updated 6 years ago
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆24Updated 5 years ago
• The-OpenROAD-Project-Attic / Resizer
  ☆15Updated 6 years ago
• yash-k99 / vsdsram
  Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM
  ☆19Updated 5 years ago
• d-m-bailey / cvc
  CVC: Circuit Validity Checker. Check for errors in CDL netlist.
  ☆33Updated last month
• Xilinx / fpga24_routing_contest
  Runtime-First FPGA Interchange Routing Contest @ FPGA’24
  ☆35Updated 8 months ago
• YosysHQ-GmbH / SVA-AXI4-FVIP
  YosysHQ SVA AXI Properties
  ☆43Updated 2 years ago