Alternatives and similar repositories for Mixed-Cell-Height_legalizer

Users that are interested in Mixed-Cell-Height_legalizer are comparing it to the libraries listed below

• cuhk-eda / Xplace
  Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization
  ☆148Updated 5 months ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆140Updated 2 years ago
• cuhk-eda / ripple
  Pin-Accessible Legalization for Mixed-Cell-Height Circuits
  ☆29Updated 3 years ago
• TILOS-AI-Institute / HypergraphPartitioning
  Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes
  ☆76Updated 2 weeks ago
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆107Updated last year
• cuhk-eda / cu-gr-2
  ☆48Updated last year
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆133Updated last year
• cuhk-eda / dr-cu
  Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
  ☆140Updated 2 years ago
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆187Updated 6 months ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆97Updated 2 weeks ago
• jkim971201 / SkyPlace
  ☆19Updated last year
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆77Updated 7 years ago
• geziangfinn / easyPlace
  Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS
  ☆53Updated last year
• The-OpenROAD-Project / RePlAce
  RePlAce global placement tool
  ☆242Updated 5 years ago
• EricLu1218 / Physical_Design_Automation
  NTHU CS6135 VLSI Physical Design Automation Course Projects (include Two-way Min-cut Partitioning, Fixed-outline Slicing Floorplan Design…
  ☆42Updated 3 months ago
• ABKGroup / TritonPart
  The first version of TritonPart
  ☆29Updated last year
• lamda-bbo / Efficient-TDP
  Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".
  ☆58Updated 5 months ago
• Daikon-Sun / Physical-Design-for-Nanometer-ICs
  Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)
  ☆43Updated 6 years ago
• ABKGroup / TritonRoute-WXL
  ☆34Updated 5 years ago
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆58Updated 5 years ago
• ABKGroup / MBFFClustering
  ☆13Updated last year
• tsung-wei-huang / ece5960-physical-design
  ☆40Updated 3 years ago
• sanggido / OpenDP
  Open Source Detailed Placement engine
  ☆40Updated 6 years ago
• PKU-IDEA / OpenPARF
  🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit
  ☆162Updated 7 months ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆74Updated this week
• geochrist / dctk
  Delay Calculation ToolKit
  ☆32Updated 3 years ago
• asyncvlsi / lefdef
  Mirror of the Si2 LEF/DEF parser (v5.8)
  ☆17Updated 4 years ago
• TimingPredict / TimingPredict
  Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)
  ☆84Updated last year
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆88Updated 7 months ago
• bu-icsg / TAP-2.5D
  ☆38Updated 4 years ago