Alternatives and similar repositories for lefdef_util:

Users that are interested in lefdef_util are comparing it to the libraries listed below

• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆49Updated 4 years ago
• jinwookjungs / datc_robust_design_flow
  DATC Robust Design Flow.
  ☆37Updated 5 years ago
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆53Updated 4 years ago
• AUCOHL / OGRE
  Global Router Built for ICCAD Contest 2019
  ☆30Updated 4 years ago
• scale-lab / OpenPhySyn
  EDA physical synthesis optimization kit
  ☆50Updated last year
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆38Updated 5 years ago
• ABKGroup / RosettaStone
  ☆24Updated 2 years ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆71Updated 7 years ago
• ABKGroup / PROBE3.0
  ☆39Updated 11 months ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆46Updated 3 months ago
• ckchengucsd / SMT-based-STDCELL-Layout-Generator-for-PROBE2.0
  SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0
  ☆17Updated 4 years ago
• Ravenslofty / librecell
  ☆20Updated 3 years ago
• The-OpenROAD-Project-Attic / OpenROAD-Utilities
  Open-sourced utilities for initial flow setup, calibration, and other user functions for OpenROAD project
  ☆19Updated 5 years ago
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆84Updated 4 years ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆81Updated 7 months ago
• asyncvlsi / SPRoute
  A parallel global router using the Galois framework
  ☆27Updated last year
• aolofsson / IDEA
  ☆33Updated 5 years ago
• sanggido / OpenDP
  Open Source Detailed Placement engine
  ☆36Updated 5 years ago
• magical-eda / MAGICAL-CIRCUITS
  Circuit release of the MAGICAL project
  ☆31Updated 5 years ago
• ABKGroup / PROBE_SMT_AutoCell
  ☆17Updated last year
• jpsety / verilog_benchmark_circuits
  EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog
  ☆26Updated 5 years ago
• The-OpenROAD-Project / DAC-2020-Tutorial
  Material for OpenROAD Tutorial at DAC 2020
  ☆46Updated 2 years ago
• The-OpenROAD-Project / TritonCTS
  Source codes and calibration scripts for clock tree synthesis
  ☆40Updated 5 years ago
• ckchengucsd / SMT-based-STDCELL-Layout-Generator
  SMT-based-STDCELL-Layout-Generator
  ☆17Updated 3 years ago
• jinwookjungs / open_design_flow
  OpenDesign Flow Database
  ☆16Updated 6 years ago
• UTDA-group / BoxRouter
  BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…
  ☆20Updated 6 years ago
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆99Updated last year
• asyncvlsi / lefdef
  Mirror of the Si2 LEF/DEF parser (v5.8)
  ☆13Updated 3 years ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆128Updated 2 years ago
• Coloquinte / Coloquinte_placement
  An analytical VLSI placer
  ☆28Updated 3 years ago