Alternatives and similar repositories for cva6-wrapper

Users that are interested in cva6-wrapper are comparing it to the libraries listed below

• freechipsproject / chisel-coverage
  A coverage library for Chisel designs
  ☆11Updated 5 years ago
• ucb-bar / barstools
  Useful utilities for BAR projects
  ☆32Updated 2 years ago
• ucb-bar / nvdla-wrapper
  Wraps the NVDLA project for Chipyard integration
  ☆22Updated 4 months ago
• ucb-bar / shuttle
  A Rocket-based RISC-V superscalar in-order core
  ☆36Updated 3 months ago
• ucb-bar / esp-isa-sim
  Custom extensions to the RISC-V isa simulator for the UCB-BAR ESP project
  ☆17Updated 3 years ago
• IBM / chiffre
  A fault-injection framework using Chisel and FIRRTL
  ☆36Updated 3 months ago
• pku-liang / Cement
  The Next-gen Language & Compiler Powering Efficient Hardware Design
  ☆34Updated 11 months ago
• chipsalliance / rocket-chip-inclusive-cache
  An RTL generator for a last-level shared inclusive TileLink cache controller
  ☆22Updated 11 months ago
• IBM / esp-chisel-accelerators
  Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)
  ☆24Updated 5 years ago
• freechipsproject / chisel-cheatsheet
  Chisel Cheatsheet
  ☆34Updated 2 years ago
• chipsalliance / rocket-chip-fpga-shells
  Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards
  ☆20Updated last year
• hplp / aes_chisel
  Implementation of the Advanced Encryption Standard in Chisel
  ☆19Updated 3 years ago
• zhemao / riscv-dma3
  The 3rd Iteration of the Berkeley RISC-V DMA Accelerator
  ☆28Updated 6 years ago
• jiegec / fpu-wrappers
  Wrappers for open source FPU hardware implementations.
  ☆37Updated last month
• chick / visualizer
  Provides dot visualizations of chisel/firrtl circuites
  ☆13Updated 6 years ago
• OpenXiangShan / Utility
  ☆15Updated this week
• ucb-bar / chisel-awl
  ☆13Updated 4 years ago
• maltanar / rosetta
  Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ
  ☆34Updated 7 years ago
• mrc-donato / CHIPKIT-Tutorial
  ☆15Updated 4 years ago
• zhemao / chisel-float
  Floating point modules for CHISEL
  ☆32Updated 11 years ago
• j-marjanovic / chisel-bfm-tester
  BFM Tester for Chisel HDL
  ☆14Updated 4 years ago
• easysoc / layered-firrtl
  This repository is outdated and the related functionality has been migrated to https://github.com/easysoc/easysoc-firrtl
  ☆11Updated 4 years ago
• OpenXiangShan / CoupledL2
  Open-source non-blocking L2 cache
  ☆52Updated this week
• StanfordAHA / doc
  Papers, Posters, Presentations, Documentation...
  ☆19Updated 2 years ago
• bespoke-silicon-group / bsg_bladerunner
  Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)
  ☆44Updated 6 months ago
• StanfordAHA / lake
  Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory ma…
  ☆23Updated last week
• google / open-chiplet
  ☆27Updated 4 years ago
• spcl / apfp
  FPGA acceleration of arbitrary precision floating point computations.
  ☆40Updated 3 years ago
• PeterAaser / tdt4255-chisel-intro
  ☆26Updated 5 years ago
• freechipsproject / ip-contributions
  For contributions of Chisel IP to the chisel community.
  ☆70Updated last year