Alternatives and similar repositories for broccoli

Users that are interested in broccoli are comparing it to the libraries listed below

• ucb-bar / cva6-wrapper
  Wrapper for ETH Ariane Core
  ☆21Updated this week
• freechipsproject / chisel-coverage
  A coverage library for Chisel designs
  ☆11Updated 5 years ago
• ucb-bar / barstools
  Useful utilities for BAR projects
  ☆32Updated last year
• chipsalliance / rocket-chip-blocks
  RTL blocks compatible with the Rocket Chip Generator
  ☆16Updated 5 months ago
• ducky64 / chisualizer
  Block-diagram style digital logic visualizer
  ☆23Updated 9 years ago
• ucb-bar / chisel-awl
  ☆14Updated 4 years ago
• hplp / aes_chisel
  Implementation of the Advanced Encryption Standard in Chisel
  ☆19Updated 3 years ago
• jiegec / fpu-wrappers
  Wrappers for open source FPU hardware implementations.
  ☆33Updated last year
• felsabbagh3 / Vortex
  RISC-V GPGPU
  ☆34Updated 5 years ago
• DFiantHDL / DFHDL
  DFiant HDL (DFHDL): A Dataflow Hardware Descripition Language
  ☆88Updated this week
• x-epic / EpicFV
  ☆20Updated 4 years ago
• Lampro-Mellon / Quasar
  Quasar 2.0: Chisel equivalent of SweRV-EL2
  ☆30Updated 4 years ago
• IBM / chiffre
  A fault-injection framework using Chisel and FIRRTL
  ☆37Updated 3 months ago
• IBM / rocc-software
  C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)
  ☆54Updated 5 years ago
• jbush001 / ChiselGPU
  Experiments with fixed function renderers and Chisel HDL
  ☆59Updated 6 years ago
• j-marjanovic / chisel-bfm-tester
  BFM Tester for Chisel HDL
  ☆14Updated 3 years ago
• asinghani / crypto-accelerator-chip
  Cryptography accelerator ASIC (for AES128/AES256 and SHA256) using Skywater 130nm process node (main project repo). Taped out in December…
  ☆22Updated 4 years ago
• franzflasch / leiwand_rv32
  RISC-V RV32I CPU written in verilog
  ☆10Updated 5 years ago
• StanfordAHA / lassen
  The PE for the second generation CGRA (garnet).
  ☆17Updated 4 months ago
• ucb-bar / esp-isa-sim
  Custom extensions to the RISC-V isa simulator for the UCB-BAR ESP project
  ☆17Updated 2 years ago
• SymbioticEDA / getting-started-FV
  ☆18Updated 5 years ago
• SpinalHDL / SpinalCrypto
  SpinalHDL - Cryptography libraries
  ☆57Updated last year
• YosysHQ / yosys-tests
  Collection of test cases for Yosys
  ☆18Updated 3 years ago
• B-Lang-org / bdw
  BSC Development Workstation (BDW)
  ☆30Updated 10 months ago
• chipsalliance / treadle
  Chisel/Firrtl execution engine
  ☆154Updated last year
• aswaterman / trainwreck
  Original RISC-V 1.0 implementation. Not supported.
  ☆41Updated 6 years ago
• zhemao / riscv-dma
  A DMA Controller for RISCV CPUs
  ☆14Updated 10 years ago
• IBM / esp-chisel-accelerators
  Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)
  ☆24Updated 5 years ago
• SiliconSemantics / firrtlator
  firrtlator is a FIRRTL C++ library
  ☆23Updated 8 years ago
• chipsalliance / rocket-chip-fpga-shells
  Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards
  ☆19Updated 9 months ago