Alternatives and similar repositories for chisel-playground

Users that are interested in chisel-playground are comparing it to the libraries listed below

• OSCPU / yosys-sta
  ☆83Updated 5 months ago
• OSCPU / ysyxSoC
  ☆87Updated 2 weeks ago
• ysyx-ta / ysyx-summer-readings
  ☆67Updated last year
• OSCPU-Zhoushan / Zhoushan
  Open Source Chip Project by University (OSCPU) - Zhoushan Core
  ☆52Updated 3 years ago
• OpenXiangShan / XiangShan-Design-Doc
  Documentation for XiangShan Design
  ☆32Updated this week
• tastynoob / aura-core
  "aura" my super-scalar O3 cpu core
  ☆24Updated last year
• FurryAcetylCoA / gtkwave-filter-process-RISC
  A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave
  ☆31Updated 5 months ago
• OpenXiangShan / difftest
  Modern co-simulation framework for RISC-V CPUs
  ☆157Updated this week
• XS-MLVP / picker
  Pick your favorite language to verify your chip.
  ☆70Updated last week
• OpenXiangShan / GEM5
  ☆103Updated this week
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆180Updated 11 months ago
• lizhirui / DreamCoreV2
  ☆22Updated 2 years ago
• schoeberl / chisel-lab
  Lab exercises for Chisel in the digital electronics 2 course at DTU
  ☆210Updated 3 months ago
• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆49Updated last week
• lizhirui / DreamCore
  ☆64Updated 3 years ago
• ucb-bar / constellation
  A Chisel RTL generator for network-on-chip interconnects
  ☆211Updated last month
• microdynamics-cpu / tree-core-cpu
  A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, …
  ☆41Updated last year
• ccelio / chisel-style-guide
  A Style Guide for the Chisel Hardware Construction Language
  ☆108Updated 4 years ago
• Jpz-sdju / trinity
  ☆28Updated 2 months ago
• OpenXiangShan / xs-env
  XiangShan Frontend Develop Environment
  ☆66Updated last week
• OpenXiangShan / XS-Verilog-Library
  ☆44Updated 3 years ago
• sycuricon / starship
  Run rocket-chip on FPGA
  ☆76Updated 2 weeks ago
• sifferman / labs-with-cva6
  Advanced Architecture Labs with CVA6
  ☆68Updated last year
• CherrySprings / CherrySprings
  ☆18Updated 2 years ago
• OpenXiangShan / gsim
  ☆55Updated 3 weeks ago
• OpenXiangShan / fudian
  Open source high performance IEEE-754 floating unit
  ☆84Updated last year
• NOP-Processor / NOP-Core
  High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
  ☆84Updated 2 years ago
• Yawei-Ding / ysyx_riscv64_cpu
  ☆70Updated 2 years ago
• ic-lab-duth / RISC-V-Vector
  Vector processor for RISC-V vector ISA
  ☆128Updated 4 years ago
• zencove-thu / zencove-zoom
  Highly configurable out-of-order MIPS32 processor, capable of booting Linux.
  ☆40Updated 2 years ago