An open source SDR SDRAM controller based on the AXI4 bus and verified by FPGA and tapeout. It can support memory particles of different manufacturers and models through parameter configuration.
☆22May 12, 2025Updated 11 months ago
Alternatives and similar repositories for sdram
Users that are interested in sdram are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- RISC-V 64 CPU☆10Oct 4, 2025Updated 6 months ago
- Synopsys Verdi applet that presents a view of the source code running on a RISC-V processor with a simulation waveform.☆33Feb 6, 2020Updated 6 years ago
- This repository is outdated and the related functionality has been migrated to https://github.com/easysoc/easysoc-firrtl☆11Nov 3, 2021Updated 4 years ago
- ☆12Updated this week
- Header-only C/C++ static keys to avoid the overhead of conditional branches☆14Feb 10, 2024Updated 2 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- This is an IDE for YSYX_NPC debuging☆12Dec 10, 2024Updated last year
- ☆16Jan 18, 2025Updated last year
- 生态模拟仿真系统☆10Aug 5, 2020Updated 5 years ago
- Educational verilog library that supports IEEE754 floating point arithmetic with a parametrizable mantissa and exponent☆32Mar 13, 2025Updated last year
- simple 4-BIT CPU with 74-serials chip，origin by Kaoru Tonami in his book “How to build a CPU”☆14Oct 19, 2024Updated last year
- ☆25Nov 14, 2023Updated 2 years ago
- ASIC Design kit for Skywater 130 for use with mflowgen☆14Mar 12, 2023Updated 3 years ago
- Basic chisel difftest environment for RTL design (WIP☆21Mar 8, 2025Updated last year
- Network-on-Chip simulator (Booksim) with hooks for co-simulating RTL designs in Verilog.☆25Nov 2, 2015Updated 10 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- MatchLib Connections Toolkit - example designs leveraging Connections☆16Jan 6, 2026Updated 3 months ago
- [ASP-DAC 2025] "NeuronQuant: Accurate and Efficient Post-Training Quantization for Spiking Neural Networks" Official Implementation☆19Mar 6, 2025Updated last year
- Nix template for the chisel-based industrial designing flows.☆56Apr 23, 2025Updated last year
- Project 2.2 Frequency counter☆12May 30, 2025Updated 11 months ago
- A stream to RTL compiler based on MLIR and CIRCT☆16Nov 15, 2022Updated 3 years ago
- Pulp virtual platform☆24Jul 16, 2025Updated 9 months ago
- A tiny FP8 multiplication unit written in Verilog. TinyTapeout 2 submission.☆14Nov 23, 2022Updated 3 years ago
- ☆21May 26, 2025Updated 11 months ago
- Research Interan@BARC FPGA based High-Throughput Generic ECC Implementation in Binary Extension Field☆23Feb 20, 2017Updated 9 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- CPU敏捷开发框架（龙芯杯2024）☆27Sep 6, 2024Updated last year
- FPGA Audio Manipulation & Effects in Verilog | DJ sound mixer that is able to create remixes of voices, sounds and melodies☆12Jul 15, 2019Updated 6 years ago
- Learn, share and collaborate on ASIC design using open tools and technologies☆13Dec 27, 2020Updated 5 years ago
- ☆52Jan 16, 2025Updated last year
- ☆14Mar 13, 2026Updated last month
- My tests and experiments with some popular dl frameworks.☆17Sep 11, 2025Updated 7 months ago
- VCD (Value Change Dump) Tracing for C++☆15Apr 22, 2026Updated last week
- 冯如杯项目-嵌入式实时对象检测系统☆11Mar 20, 2019Updated 7 years ago
- Python tools for processing Verilog files☆10Dec 7, 2011Updated 14 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- ☆70Updated this week
- 顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel☆29Jan 25, 2026Updated 3 months ago
- mark/sweep garbage collector for C☆30Mar 24, 2012Updated 14 years ago
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 6 years ago
- ☆21Jun 17, 2014Updated 11 years ago
- An automated HDC platform☆11Mar 16, 2026Updated last month
- Mirror of https://gitee.com/loongson-edu/open-la500.git☆26Jan 2, 2025Updated last year