A docker image for One Student One Chip's debug exam
☆10Sep 22, 2023Updated 2 years ago
Alternatives and similar repositories for ysyx-docker
Users that are interested in ysyx-docker are comparing it to the libraries listed below
Sorting:
- 给NEMU移植Linux Kernel!☆22Jun 1, 2025Updated 9 months ago
- A fork of Xiangshan for AI☆36Updated this week
- GPGPU-Sim 中文注释版代码，包含 GPGPU-Sim 模拟器的最新版代码，经过中文注释，以帮助中文用户更好地理解和使用该模拟器。☆28Dec 18, 2024Updated last year
- ☆66Aug 5, 2024Updated last year
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆21Apr 25, 2025Updated 10 months ago
- ☆13May 8, 2025Updated 9 months ago
- A suite of tools for pretty printing, diffing, and exploring abstract syntax trees.☆15Feb 27, 2026Updated last week
- 适用于龙芯杯团队赛入门选手的应急cache模块☆30Mar 13, 2024Updated last year
- ☆93Nov 12, 2025Updated 3 months ago
- A cycle-accurate RISC-V CPU simulator + RTL modeling library in pure Python.☆18Aug 27, 2025Updated 6 months ago
- 【2024年新版】国科大 陈云霁 智能计算系统AICS实验代码☆13May 31, 2024Updated last year
- A small Neural Network Processor for Edge devices.☆16Nov 22, 2022Updated 3 years ago
- ☆17May 9, 2022Updated 3 years ago
- Microarchitecture diagrams of several CPUs☆47Updated this week
- Lab assignments for the Agile Hardware Design course☆18Nov 14, 2025Updated 3 months ago
- Fuzzing General-Purpose Hardware Designs with Software Fuzzers☆24Jan 11, 2026Updated last month
- A riscv emulator.☆19Feb 5, 2024Updated 2 years ago
- Basic chisel difftest environment for RTL design (WIP☆20Mar 8, 2025Updated 11 months ago
- Xiangshan deterministic workloads generator☆24May 14, 2025Updated 9 months ago
- ☆19Jan 2, 2026Updated 2 months ago
- NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators☆50Jan 2, 2025Updated last year
- LLMA = LLM + Arithmetic coder, which use LLM to do insane text data compression. LLMA=大模型+算术编码，它能使用LLM对文本数据进行暴力的压缩，达到极高的压缩率。☆22Nov 24, 2024Updated last year
- PDPU: An Open-Source Posit Dot-Product Unit for Deep Learning Applications☆43May 5, 2023Updated 2 years ago
- 体系结构研讨 + ysyx高阶大纲 (WIP☆200Oct 14, 2024Updated last year
- Nix template for the chisel-based industrial designing flows.☆52Apr 23, 2025Updated 10 months ago
- minimal C implementation of speculative decoding based on llama2.c☆25Jul 15, 2024Updated last year
- This is the open-source version of TinyTS. The code is dirty so far. We may clean the code in the future.☆19Aug 11, 2025Updated 6 months ago
- ☆22Nov 3, 2025Updated 4 months ago
- 性能分析工具在线书☆23Sep 23, 2019Updated 6 years ago
- Parendi: Thousand-way Parallel RTL Simulation on the Graphcore IPU☆25Nov 26, 2025Updated 3 months ago
- ☆22Nov 25, 2023Updated 2 years ago
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆15Feb 23, 2026Updated last week
- Build mini linux for your own RISC-V emulator!☆24Sep 11, 2024Updated last year
- Deepseek-r1复现科普与资源汇总☆22Mar 5, 2025Updated last year
- Open source RTL implementation of Tensor Core, Sparse Tensor Core, BitWave and SparSynergy in the article: "SparSynergy: Unlocking Flexib…☆22Mar 29, 2025Updated 11 months ago
- ☆63Apr 22, 2025Updated 10 months ago
- A Heterogeneous GPU Platform for Chipyard SoC☆44Updated this week
- Open Source Chip Project by University (OSCPU) - Zhoushan Core☆54Jul 23, 2022Updated 3 years ago
- "aura" my super-scalar O3 cpu core☆25May 25, 2024Updated last year