☆44Dec 5, 2025Updated 3 months ago
Alternatives and similar repositories for espresso
Users that are interested in espresso are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- CPU敏捷开发框架（龙芯杯2024）☆26Sep 6, 2024Updated last year
- 本项目已被合并至官方Chiplab中☆13Jan 13, 2025Updated last year
- 顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel☆26Jan 25, 2026Updated last month
- ☆16Updated this week
- This is an IDE for YSYX_NPC debuging☆12Dec 10, 2024Updated last year
- Nix template for the chisel-based industrial designing flows.☆56Apr 23, 2025Updated 11 months ago
- nscscc2024，HPU河南理工大学参赛作品，两仪处理器☆11Aug 24, 2024Updated last year
- A repository that implements Tywaves: enabling a type-based waveform debugging for Chisel and Tydi-Chisel. Mapping from Chisel level code…☆58Oct 27, 2024Updated last year
- The Scala parser to parse riscv/riscv-opcodes generate☆25Jan 21, 2026Updated 2 months ago
- A eDSL framework based on Scala and MLIR, focusing on the Hardware design.☆67Updated this week
- A riscv emulator.☆19Feb 5, 2024Updated 2 years ago
- RISC-V 64 CPU☆10Oct 4, 2025Updated 5 months ago
- Taiwei-3D-Flow☆41Mar 2, 2026Updated 3 weeks ago
- ☆67Mar 3, 2026Updated 2 weeks ago
- Second Prize in NSCSCC 2024. An out-of-order CPU designed by NoAXI team from HDU. 2024年全国大学生计算机系统能力大赛CPU设计赛（龙芯杯）团队赛二等奖作品☆23Sep 14, 2024Updated last year
- 无刷电机驱动 程序+电路板 FOC for BLDC motor, code and PCB project☆14Jan 27, 2024Updated 2 years ago
- ☆13May 8, 2025Updated 10 months ago
- ☆17Jun 24, 2024Updated last year
- Logic Minimization in Python☆26Feb 23, 2026Updated last month
- ☆13Apr 24, 2024Updated last year
- The batteries-included testing and formal verification library for Chisel-based RTL designs.☆233Aug 19, 2024Updated last year
- ☆36Jul 22, 2025Updated 8 months ago
- A framework for ysyx flow☆13Oct 31, 2024Updated last year
- DenseQMC: A bit-slice implementation of the Quine-McCluskey algorithm☆16Dec 30, 2025Updated 2 months ago
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- Verilator Porcelain☆49Nov 7, 2023Updated 2 years ago
- Quickly update a bitstream with new RAM contents☆16Jun 8, 2021Updated 4 years ago
- An Open Source Link Protocol and Controller☆29Jul 26, 2021Updated 4 years ago
- ☆71Feb 2, 2026Updated last month
- Mirror of https://gitee.com/loongson-edu/open-la500.git☆26Jan 2, 2025Updated last year
- Examples for creating AXI-interfaced peripherals in Chisel☆75Nov 15, 2015Updated 10 years ago
- A dynamic verification library for Chisel.☆160Nov 9, 2024Updated last year
- Density test bench for RISCV - "Compress extension"☆15Jun 21, 2021Updated 4 years ago
- Chisel3 AXI4-{Lite, Full, Stream} Definitions☆15Dec 31, 2018Updated 7 years ago
- A Scala library for Context-Dependent Environments☆51Apr 25, 2024Updated last year
- 2022龙芯杯个人赛三等奖作品☆14Oct 11, 2023Updated 2 years ago
- This repository contains some tools to monitor the UNC_CBO_CACHE_LOOKUP event of the C-Boxes.☆12Oct 11, 2017Updated 8 years ago
- ☆11Dec 23, 2025Updated 3 months ago
- ☆14Mar 21, 2022Updated 4 years ago