Alternatives and similar repositories for Yuri

Users that are interested in Yuri are comparing it to the libraries listed below

• ftppz / ShanghaiTech-YSYX
  Unofficial guide for ysyx students applying to ShanghaiTech University
  ☆23Updated 9 months ago
• Tang-Haojin / YuQuan
  A RISC-V core running Debian (and a LoongArch core running Linux).
  ☆22Updated last month
• isnthzy / lightsss-chiplab
  本项目已被合并至官方Chiplab中
  ☆13Updated 11 months ago
• chipsalliance / chisel-nix
  Nix template for the chisel-based industrial designing flows.
  ☆51Updated 8 months ago
• chipsalliance / rvdecoderdb
  The Scala parser to parse riscv/riscv-opcodes generate
  ☆21Updated 3 months ago
• Kumonda221-CrO3 / gitlab-runner-vivado
  Vivado in GitLab-Runner for GitLab CI/CD
  ☆10Updated 3 years ago
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆61Updated 3 years ago
• Seeker0472 / ysyx-linux
  给NEMU移植Linux Kernel!
  ☆21Updated 6 months ago
• 1932287243 / NPC_IDE
  This is an IDE for YSYX_NPC debuging
  ☆12Updated last year
• OSCPU / openperf
  ☆11Updated 10 months ago
• MAdrid1011 / Zircon
  ☆29Updated 11 months ago
• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆50Updated 3 months ago
• arch-simulator-sig / chisel-env
  Basic chisel difftest environment for RTL design (WIP
  ☆19Updated 9 months ago
• chipsalliance / chisel-interface
  The 'missing header' for Chisel
  ☆22Updated 9 months ago
• FurryAcetylCoA / gtkwave-filter-process-RISC
  A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave
  ☆31Updated 8 months ago
• OpenXiangShan / gsim
  ☆64Updated 2 months ago
• secure-v / vsh
  VSH（SHell for Visualizing vcd file）项目为数字波形文件命令行查看器。
  ☆24Updated 2 weeks ago
• OpenRigil / openrigil-rtl
  Open-source RISC-V cryptographic hardware token, RTL repo
  ☆20Updated 3 years ago
• iscas-tis / chisel-formal-verification
  Formal verification tools for Chisel and RISC-V
  ☆13Updated last year
• LainChip / LainCore
  Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.
  ☆45Updated last year
• cyyself / cemu
  A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …
  ☆119Updated last year
• Maxpicca-Li / CDIM
  CQU Dual Issue Machine
  ☆38Updated last year
• comparch-security / FlexiCAS
  A Flexible Cache Architectural Simulator
  ☆16Updated 3 months ago
• gmlayer0 / wired
  Linux-capable out-of-order superscaler multicore LoongArch32 (LA32 / LA32R) processor.
  ☆32Updated last year
• fluctlight001 / Generic-Cache-Module
  适用于龙芯杯团队赛入门选手的应急cache模块
  ☆31Updated last year
• isnthzy / nscscc2024-liangyi
  nscscc2024，HPU河南理工大学参赛作品，两仪处理器
  ☆11Updated last year
• NoAXI / NoAXI-LoongArch-CPU
  Second Prize in NSCSCC 2024. An out-of-order CPU designed by NoAXI team from HDU. 2024年全国大学生计算机系统能力大赛CPU设计赛（龙芯杯）团队赛二等奖作品
  ☆21Updated last year
• NSCSCC-2022-TJU / ChiselMIPS
  第六届龙芯杯混元形意太极门战队作品
  ☆18Updated 3 years ago
• sequencer / zaozi
  A eDSL framework based on Scala and MLIR, focusing on the Hardware design.
  ☆63Updated last week
• YSYX-OpenDoc / riscv-isa-manual
  ☆21Updated 6 months ago