Alternatives and similar repositories for Yuri:

Users that are interested in Yuri are comparing it to the libraries listed below

• Tang-Haojin / YuQuan
  A RISC-V core running Debian (and a LoongArch core running Linux).
  ☆22Updated last year
• chipsalliance / rvdecoderdb
  The Scala parser to parse riscv/riscv-opcodes generate
  ☆20Updated last week
• isnthzy / lightsss-chiplab
  本项目已被合并至官方Chiplab中
  ☆11Updated 3 months ago
• 1932287243 / NPC_IDE
  This is an IDE for YSYX_NPC debuging
  ☆12Updated 4 months ago
• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆48Updated 6 months ago
• FurryAcetylCoA / gtkwave-filter-process-RISC
  A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave
  ☆31Updated 3 weeks ago
• chipsalliance / chisel-nix
  Nix template for the chisel-based industrial designing flows.
  ☆42Updated last week
• ftppz / ShanghaiTech-YSYX
  Unofficial guide for ysyx students applying to ShanghaiTech University
  ☆21Updated 2 months ago
• OpenRigil / openrigil-rtl
  Open-source RISC-V cryptographic hardware token, RTL repo
  ☆19Updated 2 years ago
• MrAMS / Nagi
  基于difftest改进的CPU敏捷开发框架（龙芯杯2024）
  ☆15Updated 8 months ago
• chipsalliance / chisel-interface
  The 'missing header' for Chisel
  ☆20Updated last month
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆62Updated 3 years ago
• jaypiper / simulator
  ☆27Updated this week
• MaZirui2001 / Zircon
  ☆25Updated 3 months ago
• NoAXI / NoAXI-LoongArch-CPU
  Second Prize in NSCSCC 2024. Developed by team NoAXI from Hangzhou Dianzi University.
  ☆16Updated 7 months ago
• arch-simulator-sig / chisel-env
  Basic chisel difftest environment for RTL design (WIP
  ☆18Updated last month
• iscas-tis / chisel-formal-verification
  Formal verification tools for Chisel and RISC-V
  ☆14Updated 10 months ago
• OSCPU / openperf
  ☆11Updated 2 months ago
• RISMicroDevices / RMM4NC30F2X
  Gemini 30F2 (30F3 variant 00) MIPS Processor for NSCSCC2022
  ☆11Updated 2 years ago
• Maxpicca-Li / CDIM
  CQU Dual Issue Machine
  ☆36Updated 10 months ago
• secure-v / vsh
  VSH（SHell for Visualizing vcd file）项目为数字波形文件命令行查看器。
  ☆19Updated 2 weeks ago
• LainChip / LainCore
  Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.
  ☆38Updated 9 months ago
• jiegec / chisel-memory-lower
  Lower chisel memories to SRAM macros
  ☆12Updated last year
• cyyself / cemu
  A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …
  ☆116Updated 6 months ago
• sequencer / zaozi
  A eDSL framework based on Scala and MLIR, focusing on the Hardware design.
  ☆35Updated this week
• Seeker0472 / ysyx-linux
  给NEMU移植Linux Kernel!
  ☆14Updated last month
• cyyself / cyyrv64
  My RV64 CPU (Work in progress)
  ☆19Updated 2 years ago
• NSCSCC-2022-TJU / ChiselMIPS
  第六届龙芯杯混元形意太极门战队作品
  ☆17Updated 2 years ago
• jiegec / fpu-wrappers
  Wrappers for open source FPU hardware implementations.
  ☆31Updated last year
• redpanda3 / chisel-book
  Hardware design with Chisel
  ☆32Updated 2 years ago